Method of manufacturing circuit board

Abstract

Disclosed herein is a method of manufacturing a circuit board. The method of manufacturing a circuit board according to a preferred embodiment of the present invention is configured to include (A) forming a cavity 115 for a bump on one surface 111 of a carrier 110, (B) forming a bump 130 in the cavity 115 for the bump through an electroplating process, (C) laminating an insulating layer 140 on one surface 111 of the carrier 110 so as to apply the bump 130, (D) forming a circuit layer 150 including a via 155 connected with the bump 130 on the insulating layer 140, and (E) removing the carrier 110, whereby the process of forming separate solder balls is removed by forming the cavities 111 for the bumps in the carriers 110 to form the bumps, thereby simplifying the process of manufacturing a circuit board and reducing the lead time.

1 . A method of manufacturing a circuit board, comprising:
 (A) forming a cavity for a bump on one surface of a carrier;   (B) forming a bump in the cavity for the bump through an electroplating process;   (C) laminating an insulating layer on one surface of the carrier so as to apply the bump;   (D) forming a circuit layer including a via connected with the bump on the insulating layer; and   (E) removing the carrier.   
     
     
         2 . The method as set forth in  claim 1 , wherein at the forming of the cavity for the bump, the cavity for the bump has a width narrowing in a direction towards the other surface of the carrier. 
     
     
         3 . The method as set forth in  claim 1 , wherein at the forming of the bump, the bump is protruded from one surface of the carrier. 
     
     
         4 . The method as set forth in  claim 1 , wherein at the forming of the cavity for the bump, the carrier is made of metal. 
     
     
         5 . The method as set forth in  claim 1 , further comprising forming an electroless plating layer on one surface of the carrier by an electroless plating process prior to the forming of the bump. 
     
     
         6 . The method as set forth in  claim 5 , further comprising removing the electroless plating layer remaining on the insulating layer including the exposed bump after the removing of the carrier. 
     
     
         7 . The method as set forth in  claim 1 , wherein at the forming of the bump, one surface of the carrier is provided with a terminal for a passive device, a stiffener, a heat radiation layer, or an electromagnetic wave shield layer by the electroplating process. 
     
     
         8 . The method as set forth in  claim 7 , wherein at the stacking of the insulating layer, the terminal for the passive device, the stiffener, the heat radiation layer, or the electromagnetic wave shield layer are embedded in the insulating layer. 
     
     
         9 . The method as set forth in  claim 1 , wherein at the stacking of the insulating layer, the insulating layer is a thermosetting insulating layer. 
     
     
         10 . The method as set forth in  claim 1 , further comprising forming a build up layer on the insulating layer after the forming of the circuit layer on the insulating layer.