Non-volatile semiconductor memory device

Abstract

A non-volatile semiconductor device includes an n type well formed in a semiconductor substrate having a surface, the surface having a plurality of stripe shaped grooves and a plurality of stripe shaped ribs, a plurality of stripe shaped p type diffusion regions formed in upper parts of each of the plurality of ribs, the plurality of stripe shaped p type diffusion regions being parallel to a longitudinal direction of the ribs, a tunneling insulation film formed on the grooves and the ribs, a charge storage layer formed on the tunneling insulating film, a gate insulation film formed on the charge storage layer, and a plurality of stripe shaped conductors formed on the gate insulating film, the plurality of stripe shaped conductors arranged in a direction intersecting the longitudinal direction of the ribs with a predetermined interval wherein an impurity diffusion structure in the ribs are asymmetric.

1 - 37 . (canceled) 
     
     
         38 . A non-volatile semiconductor device comprising:
 an n type well formed in a semiconductor substrate; and   a memory cell array of a virtual ground array structure, the memory cell array having a plurality of P type MONOS cells arranged in matrix, adjacent ones of P type MONOS cells share a same diffusion region constituting a bit line, each of the P type MONOS cells being configured to be programmed from one side of a channel by band to band tunneling,
 wherein the same diffusion region is so configured that one of adjacent ones of the P type MONOS cells is injected hot electrons from the same diffusion region so as to be programmed and are the other one of adjacent ones of the P type MONOS cells is not injected hot electrons from the same diffusion region so as to be programmed. 
   
     
     
         39 . The non-volatile semiconductor device according to  claim 38 , wherein each of the P type MONOS cells are programmed by applying a first voltage to a bit line connected to the respective one of the P type MONOS cells, applying a second voltage higher than the first voltage to the n type well, and applying a third voltage higher than the second voltage to a word line connected to the respective one of the P type MONOS cells. 
     
     
         40 . The non-volatile semiconductor device according to  claim 38 , wherein each of the P type MONOS cells has a halo region to enhance an electrical field in the only on one side of the channel. 
     
     
         41 . The non-volatile semiconductor device according to  claim 40 , wherein each of the P type MONOS cells has an offset region to suppress programming only on the other side of the channel from the halo region. 
     
     
         42 . The non-volatile semiconductor device according to  claim 38 , wherein a plurality of grooves and ribs are formed in a surface of the n type well along a column direction, the channels of the P type MONOS cells are partly formed in bottom surfaces of the grooves. 
     
     
         43 . The non-volatile semiconductor device according to  claim 42 , wherein a plurality of bit lines made of p type diffusions are formed in the top surfaces of the ribs. 
     
     
         44 . The non-volatile semiconductor device according to  claim 43 , wherein a plurality of halo regions are formed only in first side walls of the grooves. 
     
     
         45 . The non-volatile semiconductor device according to  claim 44 , wherein a plurality of lightly doped regions are formed only in second side walls of the grooves, the second side walls being opposite to the first side walls. 
     
     
         46 . The non-volatile semiconductor device according to  claim 38 , wherein an ONO film continuously extends across at least a single row of the plurality of P type MONOS cells. 
     
     
         47 . The non-volatile semiconductor device according to  claim 46 , wherein the ONO film continuously extends across rows and columns of the plurality of P type MONOS cells. 
     
     
         48 . A method for manufacturing a non-volatile semiconductor device comprising:
 preparing a semiconductor substrate having a surface;   forming a first conductivity type well near the surface of the semiconductor substrate;   forming an ONO film over said surface of the semiconductor substrate;   forming a first polysilicon film over the ONO film;   patterning the ONO film and the first polysilicon film in a stripe pattern along a first direction;   ion-implanting, by a first angle, a second conductivity type ions into the surface of the semiconductor substrate using the patterned first polysilicon film as a shadowing mask;   filling gaps of the ONO film and the first polysilicon film in the stripe pattern with first insulating layers;   forming a second polysilicon film over the first polysilicon film and the first insulating layers; and   patterning the first polysilicon film and the second polysilicon film in a stripe pattern along a second direction perpendicular to the first direction.   
     
     
         49 . The method for manufacturing the non-volatile semiconductor device according to  claim 48  further comprising:
 ion-implanting, by a second angle, ions of the first conductivity into the surface of the semiconductor substrate using the first polysilicon film as a shadowing mask. 
 
     
     
         50 . A method for manufacturing a non-volatile semiconductor device comprising:
 preparing a semiconductor substrate having a surface;   forming a first conductivity type well near the surface of the semiconductor substrate;   forming a second conductivity type diffusion in the surface of the semiconductor substrate;   forming a first insulating film over the surface of the semiconductor substrate;   etching the first insulating film and the semiconductor substrate to form a plurality of stripe shaped grooves along a first direction and a plurality of stripe shaped ribs along the first direction, thereby leaving a plurality of stripe shaped first insulating layers on the plurality of stripe shaped ribs and isolating a plurality of stripe shaped a first diffusion regions of the second conductivity type in an upper part of corresponding one of the plurality of ribs;   ion-implanting, by a first angle, ions of the second conductivity type into the surface of the semiconductor substrate using the plurality of stripe shaped first insulating layers as a shadowing mask;   forming an ONO film over the grooves and the ribs;   forming a polysilicon film over the ONO film; and   patterning the polysilicon film in a stripe pattern along a second direction perpendicular to the first direction.   
     
     
         51 . The method for manufacturing the non-volatile semiconductor device according to  claim 50 , wherein the first conductivity type is n type and the second conductivity type is p type. 
     
     
         52 . A method for manufacturing a non-volatile semiconductor device comprising:
 preparing a semiconductor substrate having a surface;   forming a first conductivity type well near the surface of the semiconductor substrate;   forming a first insulating film over the surface of the semiconductor substrate;   etching the first insulating film and the semiconductor substrate to form a plurality of stripe shaped grooves along a first direction and a plurality of stripe shaped ribs along the first direction, thereby leaving a plurality of stripe shaped first insulating layers on the plurality of stripe shaped ribs;   ion-implanting, by a first angle, ions of the second conductivity type into the surface of the semiconductor substrate using the plurality of stripe shaped first insulating layers as a shadowing mask;   ion-implanting, by a second angle which is an opposite angle to the first angle, ions of the second conductivity type into the surface of the semiconductor substrate using the plurality of stripe shaped first insulating layers as a shadowing mask;   forming an ONO film over the grooves and the ribs;   forming a polysilicon film over the ONO film; and   patterning the polysilicon film in a stripe pattern along a second direction perpendicular to the first direction.   
     
     
         53 . The method for manufacturing the non-volatile semiconductor device according to  claim 52 , wherein the first conductivity type is n type and the second conductivity type is p type. 
     
     
         54 . A method for manufacturing a non-volatile semiconductor device comprising:
 preparing a semiconductor substrate having a surface;   forming a first conductivity type well near the surface of the semiconductor substrate;   forming a first insulating film over the surface of the semiconductor substrate;   forming a stripe shaped resist pattern along a first direction;   etching the first insulating film, using the stripe shaped resist pattern as a mask, to form a plurality of stripe shaped first insulation layers;   ion-implanting, by a first angle, ions of the second conductivity type into the surface of the semiconductor substrate using the stripe shaped resist pattern as a shadowing mask;   ion-implanting, by a second angle which is an opposite angle to the first angle, ions of the second conductivity type into the surface of the semiconductor substrate using the stripe shaped resist pattern as a shadowing mask;   etching the semiconductor substrate to form a plurality of stripe shaped grooves along the first direction and a plurality of stripe shaped ribs along the first direction, thereby leaving a plurality of stripe shaped diffusion regions of the second conductivity type in the plurality of stripe shaped ribs;   forming an ONO film over the grooves and the ribs;   forming a polysilicon film over the ONO film; and   patterning the polysilicon film in a stripe pattern along a second direction perpendicular to the first direction.   
     
     
         55 . The method for manufacturing the non-volatile semiconductor device according to  claim 54 , wherein the first conductivity type is n type and the second conductivity type is p type. 
     
     
         56 . A method for manufacturing a non-volatile semiconductor device comprising:
 preparing a semiconductor substrate having a surface;   forming a first conductivity type well near the surface of the semiconductor substrate;   forming a first insulating film over the surface of the semiconductor substrate;   forming a stripe shaped resist pattern along a first direction;   etching the first insulating film, using the stripe shaped resist pattern as a mask, to form a plurality of stripe shaped first insulation layers;   ion-implanting, by a first angle, ions of the second conductivity type into the surface of the semiconductor substrate using the stripe shaped resist pattern as a shadowing mask;   ion-implanting, by a second angle, ions of the first conductivity type into the surface of the semiconductor substrate using the stripe shaped resist pattern as a shadowing mask;   etching the semiconductor substrate to form a plurality of stripe shaped grooves along the first direction and a plurality of stripe shaped ribs along the first direction, thereby leaving a plurality of stripe shaped diffusion regions of the second conductivity type in the plurality of stripe shaped ribs;   forming an ONO film over the grooves and the ribs;   forming a polysilicon film over the ONO film; and   patterning the polysilicon film in a stripe pattern along a second direction perpendicular to the first direction.   
     
     
         57 . The method for manufacturing the non-volatile semiconductor device according to  claim 56 , wherein, the first conductivity type is n type and the second conductivity type is p type.