Methods and apparatus for multi-modal wafer testing

Abstract

Access to integrated circuits of a wafer for concurrently performing two or more types of testing, is provided by bringing a wafer and an edge-extended wafer translator into an attached state. The edge-extended wafer translator having wafer-side contact terminals and inquiry-side contact terminals disposed thereon, a first set of wafer-side contact terminals being electrically coupled to a first set of inquiry-side contact terminals, and a second set of wafer-side contact terminals being electrically coupled to a second set of inquiry-side contact terminals. The edge-extended wafer translator having a central portion generally coextensive with the attached wafer, and an edge-extended portion extending beyond the boundary generally defined by the outer circumferential edge of the wafer. A first set of pads of at least one integrated circuit is electrically coupled to the first set of wafer-side contact terminals, and a second set of pads of the integrated circuit is electrically coupled to the second set of wafer-side contact terminals. The edge-extended wafer translator may be shaped such that its edge-extended portion is not coplanar with the central portion thereof.

1 . An assembly for providing concurrent electrical access to one or more integrated circuits on a wafer, comprising:
 an edge-extended wafer translator having a central portion, and an edge-extended portion vertically offset from the central portion;   a mounting fixture upon which the vertically offset edge-extended portion is disposed; and   a wafer removably attached to the central portion of the edge-extended wafer translator;   wherein removably attaching the wafer to the central portion brings a first plurality of wafer-side contact terminals into electrical contact with a first set of pads on the wafer, and brings a second plurality of wafer-side contact terminals into electrical contact with a second set of pads on the wafer; and wherein the first plurality of wafer-side contact terminals are electrically connected to a first plurality of inquiry-side contact terminals disposed on the central portion of the edge-extended wafer translator, and the second plurality of wafer-side contacts are electrically connected to a second plurality of inquiry-side contact terminals disposed on the edge-extended portion of edge-extended wafer translator.   
     
     
         2 . The assembly of  claim 1 , further comprising a first probe structure operable to contact the first plurality of inquiry-side contact terminals, and a second probe structure operable to contact the second plurality of inquiry-side contact terminals. 
     
     
         3 . The assembly of  claim 2 , further comprising a wafer chuck operable to position the wafer for removable attachment to the edge-extended wafer translator. 
     
     
         4 . The assembly of  claim 1 , wherein the mounting fixture forms a portion of a wafer prober. 
     
     
         5 . The assembly of  claim 2 , wherein the first probe structure comprises a probe card, and the second probe structure comprises DFT/BIST probe pins.