US2012115280A1PendingUtilityA1

Film for semiconductor and semiconductor device manufacturing method

37
Assignee: YASUDA HIROYUKIPriority: Jul 9, 2009Filed: May 31, 2010Published: May 10, 2012
Est. expiryJul 9, 2029(~3 yrs left)· nominal 20-yr term from priority
H10W 74/00H10W 72/075H10W 72/884H10W 90/754H10W 72/073H10W 90/734H10W 72/30H10W 72/013C09J 7/20C08F 220/1804C08L 63/00C09J 2463/00C09J 2433/00C09J 163/00Y10T428/24983C08G 18/7621C09J 2203/326Y10T428/2848C08L 61/04Y10T428/24942C08F 218/08C09J 133/08C08L 2666/14C08G 18/6225C09J 175/14C08L 2203/206C09J 161/06C09J 7/38C09J 7/30C09J 7/40C09J 7/22C09J 2301/208C09J 2301/304C09J 2301/302
37
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A film for semiconductor includes a support film, a second adhesive layer, a first adhesive layer and a bonding layer which are laminated together in this order. This film for semiconductor is configured so that it supports a semiconductor wafer laminated on the bonding layer thereof when the semiconductor wafer is diced and the bonding layer is selectively peeled off from the first adhesive layer when a chip is picked up. This film for semiconductor is characterized in that in the case where peel strength at 23° C. of the chip is defined as “F 23 (cN/25 mm)” and peel strength at 60° C. of the chip is defined as “F 60 (cN/25 mm)”, F 23 is in the range of 10 to 80 and F 60 /F 23 is in the range of 0.3 to 5.5. This makes it possible to improve a pickup property of the chip, to thereby prevent generation of defects in a semiconductor element.

Claims

exact text as granted — not AI-modified
1 . A film for semiconductor comprising a bonding layer, at least one adhesive layer and a support film which are laminated together in this order, the film for semiconductor being adapted to be used for picking up chips obtained by laminating a semiconductor wafer onto a surface of the bonding layer opposite to the adhesive layer, and then dicing the semiconductor wafer together with the bonding layer in the laminated state into the chips,
 wherein in the case where adhesive strength measured when the chip is peeled off from the adhesive layer at 23° C. is defined as “F 23  (cN/25 mm)” and adhesive strength measured when the chip is peeled off from the adhesive layer at 60° C. is defined as “F 60  (cN/25 mm)”, F 23  is in the range of 10 to 80 and F 60 /F 23  is in the range of 0.3 to 5.5.   
     
     
         2 . The film for semiconductor as claimed in  claim 1 , wherein a constituent material of the bonding layer contains a thermosetting resin including a compound having a softening point of 70 to 130° C. of which amount is in the range of 60 to 100 wt %. 
     
     
         3 . The film for semiconductor as claimed in  claim 1 , wherein a constituent material of the bonding layer contains a thermosetting resin including a compound having a softening point of 30° C. or more but less than 70° C. of which amount is in the range of 30 wt % or less. 
     
     
         4 . The film for semiconductor as claimed in  claim 1 , wherein a constituent material of the bonding layer contains a thermosetting resin including a compound having an ICI viscosity at 25° C. of 1 to 20 dPa·s of which amount is in the range of 60 to 100 wt %. 
     
     
         5 . The film for semiconductor as claimed in  claim 1 , wherein a melt viscosity at 60° C. of a constituent material of the bonding layer is in the range of 1×10 2  to 1×10 5  Pa·s. 
     
     
         6 . The film for semiconductor as claimed in  claim 1 , wherein a constituent material of the bonding layer contains an acryl-based resin and an epoxy-based resin. 
     
     
         7 . The film for semiconductor as claimed in  claim 1 , wherein a constituent material of the bonding layer contains a phenol-based resin. 
     
     
         8 . The film for semiconductor as claimed in  claim 1 , wherein the at least one adhesive layer comprises a plurality of adhesive layers. 
     
     
         9 . The film for semiconductor as claimed in  claim 1 , wherein the plurality of adhesive layers includes a first adhesive layer positioned at a side of the semiconductor wafer, and a second adhesive layer provided between the first adhesive layer and the support film, the second adhesive layer having an adhesive property larger than that of the first adhesive layer. 
     
     
         10 . The film for semiconductor as claimed in  claim 9 , wherein a peripheral edge of the bonding layer and a peripheral edge of the first adhesive layer are located inside a peripheral edge of the second adhesive layer, respectively. 
     
     
         11 . The film for semiconductor as claimed in  claim 9 , wherein hardness of the second adhesive layer is smaller than that of the first adhesive layer. 
     
     
         12 . The film for semiconductor as claimed in  claim 9 , wherein Shore D hardness of the first adhesive layer is in the range of 20 to 60. 
     
     
         13 . The film for semiconductor as claimed in  claim 1 , wherein a region of a surface of the adhesive layer facing the bonding layer, above which the semiconductor wafer is to be laminated, has been, in advance, irradiated with an ultraviolet ray before the semiconductor wafer is laminated onto the film for semiconductor. 
     
     
         14 . A method for manufacturing a semiconductor device comprising:
 a first step of laminating a semiconductor wafer onto the film for semiconductor defined by  claim 1  so that the semiconductor wafer makes contact with the bonding layer to obtain a laminated body;   a second step of dicing the semiconductor wafer into a plurality of semiconductor elements by forming cutting lines into the laminated body from a side of the semiconductor wafer; and   a third step of picking up the chips each comprising the semiconductor element with the diced bonding layer.   
     
     
         15 . The method for manufacturing a semiconductor device as claimed in  claim 14 , wherein the cutting lines are formed so that deepest points thereof are located within the adhesive layer. 
     
     
         16 . The method for manufacturing a semiconductor device as claimed in  claim 14 , wherein a cross sectional area of a distal end portion of each cutting line, which extends beyond an interface between the bonding layer and the adhesive layer, is in the range of 5×10 −5  to 300×10 −5  mm 2 .

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.