Method of forming a field effect transistor and schottky diode

Abstract

A method for forming a field effect transistor and Schottky diode includes forming a well region in a first portion of a silicon region where the field effect transistor is to be formed but not in a second portion of the silicon region where the Schottky diode is to be formed. Gate trenches are formed extending into the silicon region. A recessed gate is formed in each gate trench. A dielectric cap is formed over each recessed gate. Exposed surfaces of the well region are recessed to form a recess between every two adjacent trenches. Without masking any portion of the active area, a zero-degree blanket implant is performed to form a heavy body region of the second conductivity type in the well region between every two adjacent trenches.

1 .- 86 . (canceled) 
     
     
         87 . A method of forming a field effect transistor and Schottky diode integrated in a die comprising an active area and a termination region surrounding the active area, the method comprising:
 forming a well region in a first portion of a silicon region where the field effect transistor is to be formed but not in a second portion of the silicon region where the Schottky diode is to be formed, the silicon region and well region being of opposite conductivity type;   forming gate trenches extending into the silicon region;   forming a recessed gate in each gate trench;   forming a dielectric cap over each gate;   recessing all exposed surfaces of the well region to form a recess in the well region between every two adjacent trenches such that the recess has sloped walls and a bottom located between a top surface of the dielectric cap and a top surface of the recessed gate; and   without masking any portion of the active area, performing a zero-degree blanket implant to form a heavy body region of the second conductivity type in the well region between every two adjacent trenches whereby the heavy body region is self-aligned to the gate trenches.   
     
     
         88 . The method of  claim 87  further comprising performing a two-pass angled implant into the sloped walls of each recess to thereby form source regions of the first conductivity type adjacent the dielectric cap, the sloped walls of the recess forming an outer wall of each source region, the source regions being self-aligned to the trenches. 
     
     
         89 . The method of  claim 88  further comprising forming a source conductor contacting the outer wall of each source region and contacting the heavy body region along the bottom of the recess, the source conductor also contacting a top surface of the second portion of the silicon region to thereby form a Schottky contact therebetween. 
     
     
         90 . The method of  claim 87  further comprising:
 forming a wide trench in the termination region; and 
 filling the wide trench with LOCOS. 
 
     
     
         91 . The method of  claim 87  further comprising forming a surface gate in the termination region simultaneously with forming the recessed gate in the gate trenches. 
     
     
         92 . The method of  claim 91  further comprising:
 forming an opening over the surface gate; and 
 forming a gate conductor contacting the surface gate through the opening. 
 
     
     
         93 . The method of  claim 87  further comprising:
 forming a termination trench in the termination region simultaneously with forming the gate trenches; 
 forming a recessed gate in the termination trench simultaneously with forming the recessed gate in the gate trenches; 
 forming an opening over the recessed gate in the termination trench; and 
 forming a gate conductor contacting the recessed gate in the termination trench through the opening. 
 
     
     
         94 . The method of  claim 91  further comprising:
 forming an opening over the surface gate; and 
 simultaneously with recessing all exposed surfaces of the well region, recessing the surface gate through the opening to thereby expose sidewalls of the surface gate through the opening; and 
 filling the opening with a gate conductor, the gate conductor contacting the surface gate along the exposed sidewalls of the surface gate. 
 
     
     
         95 . The method of  claim 87  further comprising:
 simultaneously with forming the gate trenches, forming a wide trench in the termination region; and 
 filling a bottom portion of the wide trench and each gate trench with LOCOS. 
 
     
     
         96 . The method of  claim 95  further comprising forming a termination gate simultaneously with forming the recessed gate in the gate trenches, the termination gate extending in part inside the wide trench and in part over a mesa region adjacent the wide trench. 
     
     
         97 . The method of  claim 96  further comprising:
 forming a contact opening over the termination gate in the wide trench; and 
 simultaneously with recessing all exposed surfaces of the well region, recessing the termination gate through the opening to thereby expose sidewalls of the termination gate through the opening; and 
 filling the opening with a gate conductor, the gate conductor contacting the exposed sidewalls of the termination gate. 
 
     
     
         98 . The method of  claim 87  wherein the second portion of the silicon region is blocked during the recessing step so that no recess is formed in the second portion of the silicon region. 
     
     
         99 . The method of  claim 87  further comprising:
 prior to forming the recessed gate, forming a thick bottom dielectric along a bottom portion of each gate trench; and 
 prior to forming the recessed gate, forming a gate dielectric lining the sidewalls of each gate trench, wherein the thick bottom dielectric is thicker than the gate dielectric. 
 
     
     
         100 . The method of  claim 87  further comprising:
 prior to forming the recessed gate, forming a shield electrode along a bottom portion of each gate trench; and 
 prior to forming the recessed gate, forming a dielectric layer over each shield electrode. 
 
     
     
         101 .- 108 . (canceled)