US2012175689A1PendingUtilityA1
Hydrogen passivation of integrated circuits
Est. expiryOct 7, 2029(~3.2 yrs left)· nominal 20-yr term from priority
H10P 14/69433H10P 14/6336H10W 20/075H10W 20/074H10P 95/94H10D 30/601H10D 30/0227
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Abstract
An integrated circuit with a passivation trapping layer. An integrated circuit with a hydrogen or deuterium releasing layer underlying a passivation trapping layer. Method for forming an integrated circuit having a hydrogen or deuterium releasing layer. Method for forming an integrated circuit having a passivation trapping layer.
Claims
exact text as granted — not AI-modified1 . An integrated circuit, comprising: a substrate; a transistor coupled to said substrate, where an interface between said substrate and a gate dielectric of said transistor is passivated; a passivation trapping layer overlying said transistor; and a PMD layer overlying said passivation trapping layer.
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