Memory system

Abstract

To provide a memory system which determines a memory state such as an exhaustion level and allows a memory to be efficiently used. The memory system includes a NAND type flash memory 1 in which data can be electrically written/erased, a nonvolatile memory 2 which counts the number of erase operations of the NAND type flash memory 1 and retains the number of erase operations and a maximum number of erase operations, and a controller 3 which has a connection interface 31 to be given a self-diagnosis command from a computer 4 , and retrieves the number of erase operations and the maximum number of erase operations from the nonvolatile memory 2 based on the self-diagnosis command and outputs the number of erase operations and the maximum number of erase operations to the computer 4 through the connection interface 31.

1 . A memory system comprising:
 a first memory in which data can be electrically written/erased;   a second memory which retains a number of erase operations and a maximum number of erase operations of the first memory; and   a controller configured to receive a self-diagnosis command through a connection interface, and retrieve the number of erase operations and the maximum number of erase operations from the second memory in response to receiving self-diagnosis command and output the number of erase operations and the maximum number of erase operations and threshold of an exhaustion level through the connection interface.   
     
     
         2 . The memory system according to  claim 1 , wherein the threshold of an exhaustion level is calculated by division of the number of erase operations by the maximum number of erase operations. 
     
     
         3 . The memory system according to  claim 1 , wherein the second memory retains data guarantee period information of the first memory associated with the number of erase operations, and the controller outputs the data guarantee period information in response to receiving the self-diagnosis command. 
     
     
         4 . The memory system according to  claim 1 , wherein the second memory is non-volatile random access memory. 
     
     
         5 . The memory system according to  claim 1 , wherein the number of erase operations of the first memory is retained for each block of the first memory. 
     
     
         6 . A memory system comprising:
 a first memory in which data can be electrically written/erased;   a second memory which counts the number of erase operations of the first memory and retains the number of erase operations and a maximum number of erase operations of the first memory;   a timer configured to measure an operation time; and   a controller configured to receive a self-diagnosis command through a connection interface, and retrieve from the second memory in response to receiving self-diagnosis command and output the number of erase operations, the maximum number of erase operations, operation time and threshold of remaining lifetime through the connection interface.   
     
     
         7 . The memory system according to  claim 6 , wherein the second memory further retinas a maximum operating time of the first memory, and the controller further outputs the maximum operating time in response to the self-diagnosis command. 
     
     
         8 . The memory system according to  claim 6 , wherein the second memory is non-volatile random access memory. 
     
     
         9 . The memory system according to  claim 6 , wherein a number of erase operations of the first memory is retained for each block of the first memory. 
     
     
         10 . A memory system comprising:
 a memory in which data can be electrically written/erased;   a controller configured to receive a self-diagnosis command through a connection interface, and output a number of erase operations, a maximum number of erase operations, and threshold of an exhaustion level of the memory through the connection interface in response to receiving self-diagnosis command.   
     
     
         11 . The memory system according to  claim 10 , wherein further comprising a second memory which retain the number of erase operations and the maximum number of erase operations of the first memory. 
     
     
         12 . The memory system according to  claim 11 , wherein the second memory is non-volatile random access memory. 
     
     
         13 . The memory system according to  claim 10 , wherein the threshold of an exhaustion level is calculated by division of the number of erase operations by the maximum number of erase operations. 
     
     
         14 . A system comprising:
 a host device;   a memory system electronically connected to the host device;   the memory system comprising;   a command interface configured to receive self-diagnosis command from the host device   a memory in which data can be electrically written/erased;   a controller configured to receive a self-diagnosis command through a connection interface, and output a number of erase operations, a maximum number of erase operations, and threshold of an exhaustion level of the memory through the connection interface in response to receiving self-diagnosis command.   
     
     
         15 . The system according to  claim 14 , wherein the host device calculate an exhaustion level based on the number of erase operations and the maximum number of erase operation of the memory, and determine if the calculated exhaustion level is greater than threshold of an exhaustion level. 
     
     
         16 . The system according to  claim 15 , wherein the host device output alarm signal if the calculation exhaustion level is greater than the threshold of an exhaustion level. 
     
     
         17 . The system according to  claim 15 , wherein the host device further comprising the display, and the host device displays the exhaustion level of the first memory on the display.