Epitaxial methods for reducing surface dislocation density in semiconductor materials

Abstract

The invention provides methods and structures for reducing surface dislocations of a semiconductor layer, and can be employed during the epitaxial growth of semiconductor structures and layers comprising III-nitride materials. Embodiments involve the formation of a plurality of dislocation pit plugs to prevent propagation of dislocations from an underlying layer of material into a following semiconductor layer of material.

1 . A semiconductor structure comprising:
 a first semiconductor layer having an upper surface comprising a plurality of surface pits, the surface pits intersecting emergent dislocations in the first semiconductor layer;   a plurality of dislocation pit plugs, each dislocation pit plug masking at least one of the emergent dislocations, each dislocation pit plug of the plurality comprising:
 a first masking structure disposed at least partially within a surface pit of the plurality of surface pits; and 
 a second masking structure adjacent to the upper surface of the first semiconductor layer and adjacent to the first masking structure; and 
   a following semiconductor layer covering the plurality of dislocation pit plugs;   wherein the following semiconductor layer has a lower density of surface dislocations than the first semiconductor layer.   
     
     
         2 . The semiconductor structure of  claim 1 , wherein two or more of the plurality of surface pits intercept one another to form an agglomerated pit region. 
     
     
         3 . The structure of  claim 1 , wherein at least one of the first semiconductor layer and the following semiconductor layer comprises a III-nitride material. 
     
     
         4 . The structure of  claim 1 , wherein the first and second masking structures comprise one or more amorphous materials from the group of silicon nitrides, silicon oxides and mixtures thereof. 
     
     
         5 . The structure of  claim 1 , wherein the first masking structure has an upper surface that extends above the upper surface of the first semiconductor layer. 
     
     
         6 . The structure of  claim 1 , wherein the second masking structure extends laterally from the first masking structure.