Semiconductor memory device and memory system having the same

Abstract

A semiconductor memory device is disclosed. The semiconductor device includes a memory cell array, a clock signal generator configured to receive an external clock signal from the outside of the memory device and output an internal clock signal, and a data output unit configured to receive an internal data signal from the memory cell array and output a read data signal in response to the internal clock signal. The semiconductor memory device also includes a read data strobe unit configured to output a read data strobe signal having a cycle time of n times (n is an integer equal to or more than 2) a cycle time of the internal clock signal, based on the internal clock signal.

1 . A semiconductor memory device, comprising:
 a memory cell array;   a clock signal generator configured to receive an external clock signal from the outside of the memory device and output an internal clock signal;   a data output unit configured to receive an internal data signal from the memory cell array and output a read data signal in response to the internal clock signal; and   a read data strobe unit configured to output a read data strobe signal having a cycle time of n times (n is an integer equal to or more than 2) a cycle time of the internal clock signal, based on the internal clock signal.   
     
     
         2 - 20 . (canceled)