Methods for Fabricating Integrated Passive Devices on Glass Substrates

Abstract

A method includes forming a plurality of dielectric layers over a semiconductor substrate; and forming integrated passive devices in the plurality of dielectric layers. The semiconductor substrate is then removed from the plurality of dielectric layers. A dielectric substrate is bonded onto the plurality of dielectric layers.

1 . A method comprising:
 forming a plurality of dielectric layers over a semiconductor substrate;   forming integrated passive devices in the plurality of dielectric layers;   removing the semiconductor substrate from the plurality of dielectric layers; and   bonding a dielectric substrate onto the plurality of dielectric layers.   
     
     
         2 . The method of  claim 1 , wherein the dielectric substrate and the semiconductor substrate are on a same side of the plurality of dielectric layers. 
     
     
         3 . The method of  claim 2  further comprising:
 bonding a carrier wafer on the plurality of dielectric layers, wherein the carrier wafer and the semiconductor substrate are on opposite sides of the plurality of dielectric layers; 
 after the step of bonding the carrier wafer, performing the step of removing the semiconductor substrate; 
 performing the step of bonding the dielectric substrate, with the dielectric substrate and the carrier wafer being on opposite sides of the plurality of dielectric layers; and 
 after the step of bonding the dielectric substrate, removing the carrier wafer. 
 
     
     
         4 . The method of  claim 2  further comprising forming metal bumps, wherein the metal bumps and the dielectric substrate are on opposite sides of the plurality of dielectric layers. 
     
     
         5 . The method of  claim 1 , wherein the dielectric substrate and the semiconductor substrate are on opposite sides of the plurality of dielectric layers. 
     
     
         6 . The method of  claim 5 , wherein the step of bonding the dielectric substrate is performed before the step of removing the semiconductor substrate. 
     
     
         7 . The method of  claim 5  further comprising, after the step of removing the semiconductor substrate, forming metal bumps, wherein the metal bumps and the dielectric substrate are on opposite sides of the plurality of dielectric layers. 
     
     
         8 . The method of  claim 1 , wherein the dielectric substrate comprises a glass substrate. 
     
     
         9 . The method of  claim 1  further comprising sawing the dielectric substrate and the plurality of dielectric layers into a plurality of dies, with each of the plurality of dies comprising a piece of the dielectric substrate. 
     
     
         10 . A method comprising:
 forming a dielectric layer over a semiconductor substrate;   forming a plurality of dielectric layers over the dielectric layer;   forming integrated passive devices in the plurality of dielectric layers;   forming a first passivation layer over the plurality of dielectric layers;   bonding a carrier wafer onto the first passivation layer;   removing the semiconductor substrate to expose the dielectric layer;   bonding a glass substrate onto the dielectric layer; and   removing the carrier wafer from the first passivation layer and the plurality of dielectric layers.   
     
     
         11 . The method of  claim 10 , wherein after the step of removing the carrier wafer, the first passivation layer is exposed, and wherein the method further comprises:
 forming metal vias in the first passivation layer; and   forming metal bumps over the first passivation layer, wherein the metal bumps are electrically coupled to the integrated passive devices through the metal vias.   
     
     
         12 . The method of  claim 11  further comprising:
 forming aluminum-containing pads over the first passivation layer, wherein the aluminum-containing pads are electrically coupled to the integrated passive devices through the metal vias; 
 forming a second passivation layer over the aluminum-containing pads; 
 forming under-bump metallurgies (UBMs) extending into openings in the second passivation layer and electrically coupled to the aluminum-containing pads; and 
 performing the step of forming the metal bumps. 
 
     
     
         13 . The method of  claim 10 , wherein the integrated passive devices are selected from the group consisting essentially of capacitors, inductors, and combinations thereof. 
     
     
         14 . The method of  claim 10  further comprising sawing the glass substrate and the plurality of dielectric layers into a plurality of dies, with each of the plurality of dies comprising a piece of the glass substrate. 
     
     
         15 . The method of  claim 10 , wherein the semiconductor substrate is a silicon substrate. 
     
     
         16 . A method comprising:
 forming a dielectric layer over a semiconductor substrate;   forming a plurality of dielectric layers over the dielectric layer, with integrated passive devices formed in the plurality of dielectric layers;   forming a first passivation layer over the plurality of dielectric layers;   bonding a glass substrate onto the first passivation layer;   removing the semiconductor substrate; and   forming metal bumps, wherein the metal bumps and the glass substrate are on opposite sides of the plurality of dielectric layers.   
     
     
         17 . The method of  claim 16  further comprising:
 before the step of forming the metal bumps, forming aluminum-containing pads on an opposite side of the plurality of dielectric layers than the glass substrate, wherein the aluminum-containing pads are electrically coupled to the integrated passive devices through metal vias in the dielectric layer; 
 forming a second passivation layer contacting the aluminum-containing pads; 
 forming under-bump metallurgies (UBMs) extending into openings in the second passivation layer and electrically coupled to the aluminum-containing pads; and 
 performing the step of forming the metal bumps. 
 
     
     
         18 . The method of  claim 16 , wherein the integrated passive devices are selected from the group consisting essentially of capacitors, inductors, and combinations thereof. 
     
     
         19 . The method of  claim 16  further comprising sawing the glass substrate and the plurality of dielectric layers into a plurality of dies, with each of the plurality of dies comprising a piece of the glass substrate and a piece of the plurality of dielectric layers. 
     
     
         20 . The method of  claim 16 , wherein the semiconductor substrate is a silicon substrate.