US2012211805A1PendingUtilityA1

Cavity structures for mems devices

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Assignee: WINKLER BERNHARDPriority: Feb 22, 2011Filed: Feb 22, 2011Published: Aug 23, 2012
Est. expiryFeb 22, 2031(~4.6 yrs left)· nominal 20-yr term from priority
H10D 84/00B81B 7/008B81C 2203/0735B81B 2207/015B81C 2203/0771B81B 2201/0264B81B 2203/0315B81C 1/00246B81C 1/00158B81C 2203/0707B81C 2203/0714
43
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Claims

Abstract

Embodiments relate to MEMS devices, particularly MEMS devices integrated with related electrical devices on a single wafer. Embodiments utilize a modular process flow concept as part of a MEMS-first approach, enabling use of a novel cavity sealing process. The impact and potential detrimental effects on the electrical devices by the MEMS processing are thereby reduced or eliminated. At the same time, a highly flexible solution is provided that enables implementation of a variety of measurement principles, including capacitive and piezoresistive. A variety of sensor applications can therefore be addressed with improved performance and quality while remaining cost-effective.

Claims

exact text as granted — not AI-modified
1 . A method comprising:
 forming a microelectromechanical system (MEMS) device on a substrate by:
 forming a sacrificial layer on the substrate, 
 depositing a first silicon layer on the sacrificial layer, the first silicon layer comprising at least one release aperture, 
 forming a cavity in the sacrificial layer via the at least one release aperture, and 
 sealing the cavity by depositing a second silicon layer; and 
   forming an electrical device on the substrate.   
     
     
         2 . The method of  claim 1 , further comprising depositing a cavity passivation layer in the cavity. 
     
     
         3 . The method of  claim 1 , wherein forming the sacrificial layer comprises patterning the sacrificial layer. 
     
     
         4 . The method of  claim 1 , wherein forming the sacrificial layer comprises forming a monocrystalline sacrificial layer. 
     
     
         5 . The method of  claim 1 , wherein forming the electrical device further comprises utilizing the monocrystalline sacrificial layer. 
     
     
         6 . The method of  claim 1 , wherein sealing the cavity further comprises depositing a second silicon layer comprises monocrystalline silicon. 
     
     
         7 . The method of  claim 1 , wherein forming a MEMS device comprises forming a sensor device. 
     
     
         8 . The method of  claim 7 , wherein forming a sensor device comprises forming at least one of a capacitive sensor device or a piezoresistive sensor device. 
     
     
         9 . The method of  claim 1 , wherein forming an electrical device comprises forming at least one transistor. 
     
     
         10 . The method of  claim 1 , wherein forming an electrical device comprises utilizing one of a CMOS or BICMOS process. 
     
     
         11 . The method of  claim 1 , wherein forming a MEMS device further comprises filling a portion of the cavity via at least one release aperture. 
     
     
         12 . The method of  claim 1 , further comprising forming an isolation trench between the MEMS device and the electrical device. 
     
     
         13 . A monolithic integrated sensor device comprising:
 a microelectromechanical system (MEMS) sensor formed on a substrate, the MEMS sensor comprising a cavity formed in a sacrificial layer via at least one release aperture and sealed by a silicon layer; and   an electrical device formed on the substrate.   
     
     
         14 . The device of  claim 13 , wherein the silicon layer comprises a monocrystalline silicon layer. 
     
     
         15 . The device of  claim 14 , wherein the monocrystalline silicon layer forms a part of the electrical device. 
     
     
         16 . The device of  claim 13 , further comprising an isolation trench formed between the MEMS sensor and the electrical device. 
     
     
         17 . The device of  claim 13 , wherein the MEMS sensor is one of a capacitive sensor or a piezoresistive sensor. 
     
     
         18 . The device of  claim 13 , wherein the electrical device comprises a transistor. 
     
     
         19 . The device of  claim 13 , further comprising a cavity passivation layer inside the cavity. 
     
     
         20 . The device of  claim 13 , wherein the silicon layer comprises a membrane. 
     
     
         21 . A method comprising:
 obtaining a silicon substrate;   forming an implanted layer on the silicon substrate;   patterning a monocrystalline sacrificial layer on the implanted layer;   depositing a first silicon layer on the sacrificial layer, the first silicon layer having at least one release aperture;   etching the sacrificial layer through the release aperture to form a cavity; and   sealing the cavity by depositing a second silicon layer on the first silicon layer.   
     
     
         22 . The method of  claim 21 , further comprising forming a microelectromechanical system (MEMS) sensor by carrying out the obtaining, forming, patterning, depositing, etching and sealing. 
     
     
         23 . The method of  claim 22 , further comprising forming a monolithic integrated sensor device by forming an electrical device on the substrate. 
     
     
         24 . The method of  claim 23 , wherein forming an electrical device further comprises utilizing the second silicon layer. 
     
     
         25 . The method of  claim 23 , wherein forming a MEMS sensor further comprises forming at least one of a capacitive MEMS sensor or a piezoresistive MEMS sensor, and wherein forming an electrical device further comprises forming a transistor.

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