US2012212198A1PendingUtilityA1
Semiconductor device
Est. expiryJul 16, 2028(~2 yrs left)· nominal 20-yr term from priority
H02M 3/1588H02M 1/32H02M 3/158Y02B70/10
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Claims
Abstract
A semiconductor device includes: a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line. A surge current is discharged through the third switching element to the reference voltage line when a surge is applied to a terminal connected to the inductive load in the low-side switching element.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line,
0<(a threshold voltage of the third switching element)<(an ON voltage of an internal diode of the second switching element) being satisfied,
the third switching element turning OFF when potential of a connecting point between the first switching element and the second switching element becomes higher than— (the threshold voltage of the third switching element), and the third switching element turning ON when the potential of the connecting point becomes lower than— (the threshold voltage of the third switching element).
2 . The device according to claim 1 , wherein the second switching element has a larger size than that of the third switching element.
3 . The device according to claim 1 , wherein the third switching element has lower current driving capability than that of the second switching element in a state of being applied a rated voltage is applied, and a period, when the second switching element is set to be OFF and the third switching element is set to be ON, is provided during a period when a current flows from the inductive load through the low-side switching element to the reference voltage line.
4 . The device according to claim 1 , wherein the third switching element has a gate electrode and a source electrode electrically short-circuited.
5 . The device according to claim 1 , wherein during a period when the first switching element is OFF, only the third switching element is set to be ON without setting the second switching element to be ON, and a regenerative current flows from the reference voltage line through the third switching element to the inductive load.
6 . The device according to claim 1 , wherein the first switching element and the second switching element are not set to be ON simulataneously, and the first switching element and the third switching element are not set to be ON simultaneously.
7 . A semiconductor device comprising:
a first switching element connected between an input voltage line and an inductive load; and a second switching element connected between the inductive load and a reference voltage line,
0<(a threshold voltage of the second switching element)<(an ON voltage of an internal diode of the second switching element) being satisfied,
the second switching element turning OFF when potential of a connecting point between the first switching element and the second switching element becomes higher than— (the threshold voltage of the second switching element) if gate voltage of the second switching element is reference potential, and the second switching element turning ON when the potential of the connecting point becomes lower than— (the threshold voltage of the second switching element) if the gate voltage of the second switching element is the reference potential.
8 . The device according to claim 7 , wherein when the potential of the connecting point between the first switching element and the second switching element becomes positive, the second switching element is set to be OFF.Cited by (0)
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