Computer system with dual bios

Abstract

A computer system including a first memory unit, a second memory unit and a switch unit is provided. The first memory unit stores a first BIOS. The second memory unit stores a second BIOS. The switch unit has a first configuration and a second configuration. Upon the computer system being started, the switch unit receives an enable signal. When the switch unit is in the first configuration, the enable signal is provided to the first memory unit to start the first basic input/output system. When the switch unit is in the second configuration, the enable signal is provided to the second memory unit to start the second basic input/output system.

1 . A computer system comprising:
 a first memory unit storing a first basic input/output system;   a second memory unit storing a second basic input/output system, wherein the first memory unit and the second memory unit are two independent storages in the computer system;   a switch unit comprising a first switch circuit, a second switch circuit and a selection element connected to the first switch circuit and second switch circuit;   wherein, upon the computer system being started, the switch unit receives an enable signal from a microcontroller, such that when the selection element outputs a first selection signal to the first switch circuit, the enable signal is provided through the first switch circuit to the first memory unit to start the first basic input/output system,   wherein when the selection element outputs a second selection signal to the second switch circuit, the enable signal is provided through the second switch circuit to the second memory unit to start the second basic input/output system.   
     
     
         2 . The computer system according to  claim 1 , wherein the first switch circuit has an input terminal receiving the enable signal and an output terminal coupled to the first memory unit, and the first switch circuit comprises:
 a first transistor, having a drain to be served as the input terminal of the first switch circuit, and a source to be served as the output terminal of the first switch circuit;   a second transistor, having a drain coupled to a gate of the first transistor, a source coupled to a ground voltage, and a gate receiving the first selection signal; and   a first resistor, having a first terminal receiving a second reference voltage and a second terminal coupled to the gate of the first transistor.   
     
     
         3 . The computer system according to  claim 2 , wherein the second switch circuit has an input terminal receiving the enable signal and an output terminal coupled to the second memory unit, and the second switch circuit comprises:
 a third transistor, having a drain to be served as the input terminal of the second switch circuit, and a source to be served as the output terminal of the second switch circuit;   a fourth transistor, having a drain coupled to a gate of the third transistor, a source coupled to the ground voltage, and a gate receiving the second selection signal; and   a fourth resistor, having a first terminal receiving the second reference voltage and a second terminal coupled to the gate of the third transistor.   
     
     
         4 . The computer system according to  claim 1 , wherein the selection element is a 4-terminal jumper. 
     
     
         5 . The computer system according to  claim 1 , wherein the microcontroller further comprises a transmitting interface for outputting the enable signal, a clock signal and a data output signal. 
     
     
         6 . The computer system according to  claim 5 , wherein the transmitting interface is a serial peripheral interface. 
     
     
         7 . The computer system according to  claim 1 , wherein the microcontroller is a south bridge chip or an embedded controller. 
     
     
         8 . A computer system comprising:
 a first memory unit storing a first basic input/output system;   a second memory unit storing a second basic input/output system, wherein the first memory unit and the second memory unit are two independent storages in the computer system;   a switch unit comprising a first switch circuit, a second switch circuit and a selection element connected to the first switch circuit and second switch circuit;   wherein, upon the computer system being started, the switch unit receives an enable signal from a microcontroller, such that when the selection element outputs a first selection signal to the first switch circuit, the enable signal is provided through the first switch circuit to the first memory unit to start the first basic input/output system,   wherein when the selection element outputs a second selection signal to the second switch circuit, the enable signal is provided through the second switch circuit to the second memory unit to start the second basic input/output system,   wherein the first switch circuit has an input terminal receiving the enable signal and an output terminal coupled to the first memory unit, and the second switch circuit has an input terminal receiving the enable signal and an output terminal coupled to the second memory unit.   
     
     
         9 . A computer system comprising:
 a first memory unit storing a first basic input/output system;   a second memory unit storing a second basic input/output system, wherein the first memory unit and the second memory unit are two independent storages in the computer system;   a switch unit comprising a first switch circuit, a second switch circuit and a selection element connected to the first switch circuit and second switch circuit,   wherein the selection element has a first terminal coupled to a ground voltage, a second terminal coupled to a first reference voltage through a first resistor and coupled to the first switch circuit, a third terminal coupled to the ground voltage, and a fourth terminal coupled to the first reference voltage through a second resistor and coupled to the second switch circuit,   wherein when the first and the second terminals of the selection element are connected with each other, the selection element outputs a first selection signal to the first switch circuit, and then the enable signal is provided through the first switch circuit to the first memory unit to start the first basic input/output system,   wherein when the third and the fourth terminals of the selection element are connected with each other, the selection element outputs a second selection signal to the second switch circuit, and then the enable signal is provided through the second switch circuit to the second memory unit to start the second basic input/output system.