US2012228718A1PendingUtilityA1

Method of forming an electrical fuse and a metal gate transistor and the related electrical fuse

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Assignee: LIN YUNG-CHANGPriority: Dec 18, 2009Filed: May 22, 2012Published: Sep 13, 2012
Est. expiryDec 18, 2029(~3.4 yrs left)· nominal 20-yr term from priority
H10W 20/493H10D 84/811H10D 84/0167H10D 84/038H10D 84/017H10D 30/797H10D 30/792H10D 64/021H10D 30/601H10D 64/017H10B 20/25H10B 20/00
49
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Claims

Abstract

The present invention provides a method of integrating an electrical fuse process into a high-k/metal gate process. The method simultaneously forms a dummy gate stack of a transistor and a dummy gate stack of an e-fuse; and simultaneously removes the polysilicon of the dummy gate stack in the transistor region and the polysilicon of the dummy gate stack in the e-fuse region. Thereafter, the work function metal layer disposed in the opening of the e-fuse region is removed; and the opening in the transistor region and the opening in the e-fuse region with metal conductive structures are filled to form an e-fuse and a metal gate of a transistor.

Claims

exact text as granted — not AI-modified
1 . An electrical fuse, comprising:
 a substrate comprising a fuse region with an electrical isolation structure formed therein;   an aluminum structure disposed over the electrical isolation structure;   an interlayer dielectric layer disposed over the substrate; and   at least a contact plug penetrating the interlayer dielectric layer and contacting a surface of the aluminum structure.   
     
     
         2 . The electrical fuse of  claim 1 , wherein the substrate further comprises a transistor region insulated from the fuse region. 
     
     
         3 . The electrical fuse of  claim 2 , further comprising a gate dielectric layer disposed over the substrate in the transistor region and the fuse region. 
     
     
         4 . The electrical fuse of  claim 3 , further comprising a U-shaped work function metal layer disposed only in the transistor region above the gate dielectric layer. 
     
     
         5 . The electrical fuse of  claim 3 , wherein the gate dielectric layer comprises an oxide layer and a high dielectric constant (high-k) material layer. 
     
     
         6 . The electrical fuse of  claim 1 , further comprising a spacer structure disposed on sidewalls of the aluminum structure. 
     
     
         7 . The electrical fuse of  claim 6 , wherein the spacer structure comprises:
 a first oxide layer covering the sidewalls of the aluminum structure;   a nitride cap layer covering sidewalls of the first oxide layer; and   a second oxide layer covering sidewalls of the nitride cap layer.   
     
     
         8 . The electrical fuse of  claim 1 , further comprising an etching stop layer covering the substrate and the aluminum structure.

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