US2012248624A1PendingUtilityA1

Semiconductor device and manufacturing method thereof

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Assignee: ENDO MITSUYOSHIPriority: Apr 4, 2011Filed: Dec 1, 2011Published: Oct 4, 2012
Est. expiryApr 4, 2031(~4.7 yrs left)· nominal 20-yr term from priority
Inventors:Mitsuyoshi Endo
H10W 99/00H10W 20/0242H10W 20/0234H10W 20/0238H10W 90/297H10W 72/0198H10W 70/099H10W 72/952H10W 72/9415H10W 72/942H10W 72/29H10W 72/01904H10W 72/07307H10W 70/093H10W 90/22H10W 90/722H10W 72/244H10W 90/732H10W 90/00H10P 72/7436H10P 74/232H10P 72/7402H10W 72/90H10W 20/023
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Claims

Abstract

According to one embodiment, a first back surface of a first substrate and a second front surface of a second substrate are jointed together so as to connect a first conductor with a second conductor. The first conductor includes a portion having a diameter equal to that of a first gap formed above a first metal layer in a range between the first metal layer and a first front surface, and a portion having a diameter greater than that of the first gap and smaller than an outer diameter of the first metal layer in a range between the first metal layer and the first back surface. A first insulating layer has a gap formed above the first metal layer, the gap being greater than the first gap and smaller than the outer diameter of the first metal layer.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a first substrate including:
 a first semiconductor element provided above a first front surface of the first substrate; 
 a first metal layer electrically connected to the first semiconductor element and having a first gap above the first front surface of the first substrate; 
 a first insulating layer formed above each of the first metal layer and the first front surface; and 
 a first conductor embedded in a first via hole at a forming position of the first metal layer, the first via hole penetrating the first substrate in a thickness direction thereof; and 
   a second substrate including:
 a second semiconductor element formed above a second front surface of the second substrate; and 
 a second conductor embedded in a second via hole penetrating the second substrate in a thickness direction thereof, 
   wherein a first back surface opposed to the first front surface of the first substrate and the second front surface of the second substrate are joined together so as to connect the first conductor with the second conductor,   the first conductor includes a first portion having a diameter equal to that of the first gap in a range between the first metal layer and the first front surface, and a second portion having a diameter greater than that of the first gap and smaller than an outer diameter of the first metal layer in a range between the first metal layer and the first back surface, and   the first insulating layer has a gap formed above the first metal layer, the gap being greater than the first gap and smaller than the outer diameter of the first metal layer.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein
 the second substrate further includes:
 a second metal layer formed above the second front surface and electrically connected to the second semiconductor element, the second metal layer having a second gap; and 
 a second insulating layer formed above each of the second metal layer and the second front surface, 
   the second conductor includes a third portion having a diameter equal to that of the second gap in a range between the second metal layer and the second front surface, and a fourth portion having a diameter greater than that of the second gap and smaller than an outer diameter of the second metal layer in a range between the second metal layer and a second back surface of the second substrate, the second back surface being opposed to the second front surface, and   the second insulating layer has a gap formed above the second metal layer, the gap being greater than the second gap and smaller than the outer diameter of the second metal layer.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein
 the second substrate further includes:
 a second metal layer formed above the second front surface and electrically connected to the second semiconductor element, the second metal layer having a second gap; and 
 a second insulating layer formed above each of the second metal layer and the second front surface and having a third gap, 
   the second conductor is disposed in the second via hole in a range between the second front surface and a second back surface of the second substrate, the second via hole having a diameter substantially equal to that of the first via hole, the second back surface being opposed to the second front surface, and   the third gap of the second insulating layer and the second gap of the second metal layer have a diameter greater than or equal to that of the second via hole, and the second metal layer and the second conductor are electrically disconnected.   
     
     
         4 . The semiconductor device according to  claim 3 , wherein the second substrate is a defective chip. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein
 the first substrate is thinned by polishing the first back surface and is then connected to the second substrate, and   the second substrate is thinned by polishing the second back surface.   
     
     
         6 . The semiconductor device according to  claim 1 , wherein the first and second substrates each have a thickness of 50 μm or less. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein the first substrate further includes an electrode formed above a forming position of the first conductor of the first front surface. 
     
     
         8 . The semiconductor device according to  claim 7 , wherein a contact area between the electrode and the first portion the first conductor is substantially equal to a contact area between the first metal layer and the second portion of the first conductor. 
     
     
         9 . A semiconductor device comprising:
 a first substrate including:
 a first semiconductor element provided above a first front surface of the first substrate; 
 a first metal layer electrically connected to the first semiconductor element provided above the first front surface of the first substrate; 
 a first insulating layer formed above each of the first metal layer and the first front surface; 
 a first conductor embedded in a first via hole at a forming position of the first metal layer, the first via hole penetrating the first substrate in a thickness direction thereof; and 
   a second substrate including:
 a second semiconductor element provided above a second front surface of the second substrate; and 
 a second conductor embedded in a second via hole penetrating the second substrate in a thickness direction thereof, 
   wherein a first back surface opposed to the first front surface of the first substrate and the second front surface of the second substrate are joined together so as to connect the first conductor with the second conductor, and   the first conductor has substantially the same diameter in a range between the first front surface and the first back surface.   
     
     
         10 . The semiconductor device according to  claim 9 , wherein
 the second substrate further includes:
 a second metal layer formed above the second front surface and electrically connected to the second semiconductor element, the second metal layer having a second gap; and 
 a second insulating layer formed above each of the second metal layer and the second front surface, 
   the second conductor includes a first portion having a diameter equal to that of the second gap in a range between the second metal layer and the second front surface, and a second portion having a diameter greater than that of the second gap and smaller than an outer diameter of the second metal layer in a range between the second metal layer and a second back surface of the second substrate, the second back surface being opposed to the second front surface, and   the second insulating layer has a gap formed above the second metal layer, the gap being greater than the second gap and smaller than the outer diameter of the second metal layer.   
     
     
         11 . The semiconductor device according to  claim 9 , wherein
 the second substrate further includes:
 a second metal layer formed above the second front surface and electrically connected to the second semiconductor element, the second metal layer having a second gap; and 
 a second insulating layer formed above each of the second metal layer and the second front surface and having a third gap, 
   the second conductor is disposed in the second via hole in a range between the second front surface and a second back surface of the second substrate, the second via hole having a diameter substantially equal to that of the first via hole, the second back surface being opposed to the second front surface, and   the third gap of the second insulating layer and the second gap of the second metal layer have a diameter greater than or equal to that of the second via hole, and the second metal layer and the second conductor are electrically disconnected.   
     
     
         12 . The semiconductor device according to  claim 11 , wherein the second substrate is a defective chip. 
     
     
         13 . The semiconductor device according to  claim 9 , wherein
 the first substrate is thinned by polishing the first back surface and is then connected to the second substrate, and   the second substrate is thinned by polishing the second back surface.   
     
     
         14 . A manufacturing method of a semiconductor device comprising:
 forming a first semiconductor element above a first front surface of a first substrate and forming a first metal layer electrically connected to the first semiconductor element above the first front surface of the first substrate;   bonding the first front surface of the first substrate with a base substrate;   polishing a first back surface of the first substrate, the first back surface being opposed to the first front surface;   forming a first via hole having a predetermined diameter in the first back surface;   forming a first conductor in the first via hole so as to electrically connect the first metal layer with the first conductor;   forming a second semiconductor element above a second front surface of a second substrate and forming a second metal layer having a first gap electrically connected to the second semiconductor element above the second front surface of the second substrate;   bonding the second front surface of the second substrate with the first back surface of the first substrate;   polishing a second back surface of the second substrate, the second back surface being opposed to the second front surface;   forming a second via hole in the second substrate so as to communicate with a forming position of the first conductor;   forming a second conductor in the second via hole;   removing a part of the base substrate; and   dividing a structure including at least the first substrate and the second substrate joined together.   
     
     
         15 . The manufacturing method of a semiconductor device according to  claim 14 , wherein
 in the formation of the second via hole, the second substrate is etched using the second metal layer as a mask, the second metal layer having a diameter greater than that of the first gap in a range between the second back surface and the second metal layer and having the first gap in a range between the second metal layer and the second front surface, and   in the formation of the second conductor, the second conductor is connected to the second metal layer.   
     
     
         16 . The manufacturing method of a semiconductor device according to  claim 14 , wherein
 the second via hole has a diameter substantially equal to the diameter of the first via hole,   after the formation of the second metal layer, an insulating layer having a second gap smaller than an outer diameter of the second metal layer and greater than the first gap is formed above the second front surface of the second substrate having the second metal layer formed thereon,   when the second semiconductor element is defective, the second metal layer is etched using the insulating layer as a mask so that the first gap of the second metal layer and the second gap of the insulating layer have the same diameter, after the formation of the second metal layer and before the bonding of the first and second substrates, and   in the formation of the second conductor, the second conductor and the second metal layer are disconnected.   
     
     
         17 . The manufacturing method of a semiconductor device according to  claim 14 , further comprising repeating a process from the formation of the second semiconductor element and the second metal layer above the second substrate to the formation of the second conductor, until the number of substrates to be stacked reaches a predetermined number. 
     
     
         18 . The manufacturing method of a semiconductor device according to  claim 14 , wherein
 the base substrate is a transparent substrate, and   in the removal of the base substrate, the transparent substrate is separated from the structure.   
     
     
         19 . The manufacturing method of a semiconductor device according to  claim 14 , wherein
 the first base substrate is one of a semiconductor substrate and a conductor substrate, and   in the formation of the first conductor, the first conductor is filled in the first via hole by plating using the base substrate as a plating electrode.   
     
     
         20 . The manufacturing method of a semiconductor device according to  claim 14 , wherein the first and second back surfaces are polished to polish each of the first and second substrates to a thickness of 50 μm or less.

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