Printed circuit board and manufacturing method thereof

Abstract

An embedded printed circuit board and a manufacturing method thereof are provided. The manufacturing method includes a first step of forming a first insulating layer having a seed layer formed on one side thereof and at least. one metal pattern embedded therein and a second step of laminating the first insulating layer and a base substrate with an inner circuit having a second insulating layer interposed between the first insulating layer and the base substrate. Accordingly, a printed circuit board with a circuit embedded in an insulating layer is provided, and thus a high-density and high-reliability printed circuit board can be achieved. Furthermore, since the printed circuit board is manufactured using a mold, a circuit manufacturing process for embedding, a process for forming a seed layer and a complicated process such as surface grinding are omitted so as to simplify the manufacturing process.

1 . A method of manufacturing an embedded printed circuit hoard, comprising:
 a first step of forming a first insulating layer having a seed layer formed on one side thereof and at least one metal pattern embedded therein; and   a second step of laminating the first insulating layer and a base substrate with an inner circuit having a second insulating layer interposed between the first insulating layer and the base substrate.   
     
     
         2 . The method of  claim 1 , wherein the first step comprises:
 a step a 1  of forming a negative pattern on the first insulating layer with the seed layer formed on one side thereof using a mold;   a step a 2  of filling the negative pattern with a metal material.   
     
     
         3 . The method of  claim 2 , wherein the step s 2  further comprises a step of performing chemical or physical etching to expose the seed layer. 
     
     
         4 . The method of  claim 2 , wherein the thickness of the first insulating layer equals to the thickness of a pattern of the mold. 
     
     
         5 . The method of  claim 2 , wherein the thickness of the seed layer is less than the thickness of the first insulating layer. 
     
     
         6 . The method of  claim 2 , wherein the step s 2  tills the metal material in the negative pattern through electroplating or electroless plating using the exposed seed layer. 
     
     
         7 . The method  claim 2 , further comprising a step of forming roughness on the surface of the first insulating layer before or after the step s 2 . 
     
     
         8 . The method of  claim 2 , wherein the second step sequentially laminates the first insulating layer, the second insulating layer, and the base substrate with the inner circuit and applies heat and pressure to the laminated structure. 
     
     
         9 . The method of  claim 2 , further comprising a third step of removing the seed layer formed on one side of the first insulating layer after the second step. 
     
     
         10 . The method of  claim 9 , further comprising a step of forming a via-hole in a predetermined region of the printed circuit board and filling the via-hole after the third step. 
     
     
         11 . The method of  claim 10 , wherein the via-hole is formed by coating photoresist on the printed circuit board and performing photolithography through expose, development and etching on the photoresist. 
     
     
         12 . An embedded printed circuit board comprising:
 at least one metal pattern embedded in a first insulating layer;   a second insulating layer formed under the first insulating layer; and   a base substrate formed under the second insulating layer and having an inner circuit pattern embedded in the second insulating layer.   
     
     
         13 . The printed circuit board of  claim 12 , further comprising a seed layer formed on the first insulating layer. 
     
     
         14 . The printed circuit board of  claim 12 , wherein the thickness of the metal pattern does not exceed the thickness of the first insulating layer. 
     
     
         15 . The printed circuit board of  claim 14 , further comprising a via-hole electrically connected to the inner circuit pattern embedded in the second insulating layer. 
     
     
         16 . The method  claim 3 , further comprising a step of forming roughness on the surface of the first insulating layer before or after the step s 2 . 
     
     
         17 . The method  claim 4 , further comprising a step of forming roughness on the surface of the first insulating layer before or after the step s 2 . 
     
     
         18 . The method  claim 5 , further comprising a step of forming roughness on the surface of the first insulating layer before or after the step s 2 . 
     
     
         19 . The method  claim 6 , further comprising a step of forming roughness on the surface of the first insulating layer before or after the step s 2 .