Phase change memory cells with surfactant layers

Abstract

An example embodiment is a phase change memory cell including a bottom electrode and phase change material carried within a via above the bottom electrode. A surfactant layer is deposited above the bottom electrode. The surfactant layer includes a surfactant configured to lower an interfacial force between the phase change material and the via surface.

1 . A method for fabricating a memory cell including phase change material, the method comprising:
 forming a bottom electrode within a substrate;   forming a via above the bottom electrode;   depositing a surfactant layer above the bottom electrode, the surfactant layer including a surfactant configured to lower an interfacial force between the phase change material and the via surface;   depositing the phase change material within the via.   
     
     
         2 . The method of  claim 1 , further comprising melting the phase change material such that at least part of the phase change material interacts with the surfactant and flows to the bottom of the via. 
     
     
         3 . The method of  claim 1 , further comprising forming a step spacer within the via, the step spacer narrowing a portion of the via proximate the bottom electrode. 
     
     
         4 . The method of  claim 1 , wherein the surfactant layer is deposited within the via between the bottom electrode and the phase change material after formation of the via. 
     
     
         5 . The method of  claim 1 , wherein the via is formed after deposition of the surfactant layer such that the surfactant layer forms a portion of the via surface proximate the bottom electrode. 
     
     
         6 . The method of  claim 1 , wherein the surfactant layer is deposited using atomic layer deposition (ALD). 
     
     
         7 . The method of  claim 1 , wherein the surfactant layer includes one or more of aluminum Nitride, boron nitride, aluminum oxide, tantalum nitride, tungsten, tungsten nitride, cobalt tungsten (CoW), nickel tungsten (NiW), and yttrium oxide. 
     
     
         8 . A phase change memory cell comprising:
 a bottom electrode;   phase change material carried within a via above the bottom electrode; and   a surfactant layer above the bottom electrode, the surfactant layer including a surfactant configured to lower an interfacial force between the phase change material and the via surface.   
     
     
         9 . The phase change memory cell of  claim 8 , further comprising a step spacer within the via, the step spacer narrowing a portion of the via proximate the bottom electrode. 
     
     
         10 . The phase change memory cell of  claim 8 , wherein the surfactant layer is positioned within the via between the bottom electrode and the phase change material. 
     
     
         11 . The phase change memory cell of  claim 8 , wherein the surfactant layer forms a portion of the via surface proximate the bottom electrode. 
     
     
         12 . The phase change memory cell of  claim 8 , wherein the surfactant layer includes one or more of aluminum Nitride, boron nitride, aluminum oxide, tantalum nitride, tungsten, tungsten nitride, cobalt tungsten (CoW), nickel tungsten (NiW), and yttrium oxide. 
     
     
         13 . The phase change memory cell, wherein the via has a substantially T-shaped cross section. 
     
     
         14 . An array of phase change memory cells, each phase change memory cell in the array comprising:
 a bottom electrode;   phase change material carried within a via above the bottom electrode; and   a surfactant layer above the bottom electrode, the surfactant layer including a surfactant configured to lower an interfacial force between the phase change material and the via surface.   
     
     
         15 . The array of phase change memory cells of  claim 14 , further comprising a step spacer within the via, the step spacer narrowing a portion of the via proximate the bottom electrode. 
     
     
         16 . The array of phase change memory cells of  claim 14 , wherein the surfactant layer is positioned within the via between the bottom electrode and the phase change material. 
     
     
         17 . The array of phase change memory cells of  claim 14 , wherein the surfactant layer forms a portion of the via surface proximate the bottom electrode. 
     
     
         18 . The array of phase change memory cells of  claim 14 , wherein the surfactant layer includes one or more of aluminum Nitride, boron nitride, aluminum oxide, tantalum nitride, tungsten, tungsten nitride, cobalt tungsten (CoW), nickel tungsten (NiW), and yttrium oxide. 
     
     
         19 . The array of phase change memory cells of  claim 14 , wherein the via has a substantially T-shaped cross section.