Semiconductor device with electric fuse having a flowing-out region

Abstract

A method for cutting an electric fuse formed on a semiconductor substrate by applying a predetermined electric voltage between a first interconnect and a second interconnect to flow an electric current in the electric fuse such that the electric conductor is flowed toward outside from the second interconnect to form a void region between the via and the first interconnects or in the via.

1 . A semiconductor device, comprising:
 a semiconductor substrate;   a first interconnect formed over the semiconductor substrate;   a second interconnect formed over the semiconductor substrate and the first interconnect;   an first interlayer insulating film formed between the first interconnect and the second interconnect; and   a via formed in the interlayer insulating film; wherein   the first interconnect and the second interconnect has an overlapping area in a plane view,   the via is formed in the overlapping area,   the via is connected to the second interconnect and disconnected to the first interconnect,   the second interconnect has a flowing-out region which is formed around the via in a plane view, and   the first interconnect, the second interconnect and the via comprises an electric fuse.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising:
 a void region formed in the overlapping area and formed between the first interconnect and the via.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein the first interconnect, the second interconnect and the via are composed of a copper containing metallic film, which contains copper as a major constituent. 
     
     
         4 . The semiconductor device according to  claim 2 , wherein the electric fuse further includes a first barrier metal film provided between the first interconnect and the via such that the first barrier metal film is provided in contact with the first interconnect and the via, in a condition before cutting the electric fuse, and
 wherein the void region is formed between the first barrier metal film and the first interconnect.   
     
     
         5 . The semiconductor device according to  claim 1 , wherein the second interconnect is formed to have an area along a direction in a surface of the semiconductor substrate, which is larger than that of the first interconnect. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein further comprising a second interlayer insulating film formed in a periphery of the electric fuse on the semiconductor substrate,
 wherein the second interconnect is formed in an interconnect trench formed in the second interlayer insulating film, and   wherein the flowing-out region is formed of a electric conductor flowed outside of the interconnect trench.   
     
     
         7 . The semiconductor device according to  claim 1 , further comprising a second interlayer insulating film formed in a periphery of the second interconnect on the semiconductor substrate,
 wherein the second interlayer insulating film has a Young's modulus lower than that of the first interlayer insulating film.   
     
     
         8 . The semiconductor device according to  claim 7 , wherein the second interconnect is formed in an interconnect trench formed in the second interlayer insulating film, and
 wherein the flowing-out region is formed of a electric conductor flowed outside of the interconnect trench.   
     
     
         9 . The semiconductor device according to  claim 1 , further comprising a second interlayer insulating film formed in a periphery of the second interconnect on the semiconductor substrate,
 wherein the second interlayer insulating film has a film density lower than that of the first interlayer insulating film.   
     
     
         10 . The semiconductor device according to  claim 9 , wherein said second interconnect is formed in an interconnect trench formed in the second interlayer insulating film, and
 wherein the flowing-out region is formed of a electric conductor flowed outside of the interconnect trench.   
     
     
         11 . The semiconductor device according to  claim 1 , further comprising a second interlayer insulating film formed in a periphery of the second interconnect on the semiconductor substrate,
 wherein the second interlayer insulating film has a dielectric constant lower than that of the first interlayer insulating film.   
     
     
         12 . The semiconductor device according to  claim 11 , wherein the second interconnect is formed in an interconnect trench formed in the second interlayer insulating film, and wherein the flowing-out region is formed of a electric conductor flowed outside of the interconnect trench.