Silicon carrier structure and method of forming same

Abstract

A silicon carrier structure for electronic packaging includes a base substrate, a silicon carrier substrate disposed on the base substrate, a memory chip disposed on the silicon carrier substrate, a microprocessor chip disposed on the silicon carrier substrate, an input/output chip disposed on the silicon carrier substrate, and a clocking chip disposed on the silicon carrier substrate.

1 . A method of forming a silicon carrier structure, comprising:
 etching a wafer to form etched vertical holes in the wafer;   forming via insulation and metallization using thermal oxidation;   forming back-end-of-line wiring to form X-Y wiring interconnections for space transformation connections, power and ground;   forming at least one of surface pads, microbumps or copper interconnections; and   dicing the wafer to produce one or more silicon carrier structures.   
     
     
         2 . The method of  claim 1 , further comprising:
 attaching a glass handle to the wafer using a polymer adhesive; and   thinning the wafer using mechanical grinding or polishing.   
     
     
         3 . The method of  claim 1 , further comprising testing the one or more silicon carrier structures. 
     
     
         4 . A design structure for a silicon carrier structure embodied in a computer readable storage medium, the design structure comprising:
 a base substrate;   a silicon carrier substrate disposed on the base substrate;   a memory chip disposed on the silicon carrier substrate;   a microprocessor chip disposed on the silicon carrier substrate;   an input/output chip disposed on the silicon carrier substrate; and   a clocking chip disposed on the silicon carrier substrate.