Printed circuit board (pcb) including a wire pattern, semiconductor package including the pcb, electrical and electronic apparatus including the semiconductor package, method of fabricating the pcb, and method of fabricating the semiconductor package

Abstract

A printed circuit board (PCB) includes a wire pattern that has a low processing cost and a high yield by simplifying the structure of the PCB and can increase the joining characteristics and reliability of minute bumps when a flip-chip bonding process is performed. The PCB includes a body resin layer having lower and upper surfaces, a wire pattern on or in one of the upper and lower surfaces of the body resin layer, at least one through-hole contact extending from the wire pattern through the body resin layer, and a solder resist on the upper and lower surfaces of the body resin layer, openings of the solder resist corresponding to at least one of a solder ball land and a bump land, the solder ball land and the bump land being configured to couple the PCB to a semiconductor chip.

1 . A printed circuit board (PCB) comprising:
 a body resin layer having lower and upper surfaces;   a wire pattern on or in one of the upper and lower surfaces of the body resin layer;   at least one through-hole contact extending from the wire pattern through the body resin layer; and   a solder resist on the upper and lower surfaces of the body resin layer, the solder resist defining openings corresponding to at least one of a solder ball land and a bump land, the solder ball land and the bump land being configured to couple the PCB to a device, wherein
 if the solder ball land is on the wire pattern, the bump land is on the at least one through-hole contact, and 
 if the bump land is on the wire pattern, the solder ball land is on the at least one through-hole contact. 
   
     
     
         2 . The PCB of  claim 1 , wherein if the wire pattern is on the upper surface of the body resin layer, the bump land is in the wire pattern, and if the wire pattern is on the lower surface of the body resin layer, the solder ball land is in the wire pattern. 
     
     
         3 . The PCB of  claim 1 , wherein if the wire pattern is on the lower surface of the body resin layer, the at least one through-hole contact protrudes from the upper surface of the body resin layer. 
     
     
         4 . The PCB of  claim 1 , wherein the body resin layer is a resin including at least one of a prepreg resin, a thermosetting epoxy resin, a thermoplastic epoxy resin, or a filler. 
     
     
         5 . A semiconductor package comprising:
 a printed circuit board (PCB), the PCB including,
 a body resin layer having lower and upper surfaces, 
 a wire pattern on or in one of the upper and lower surfaces of the body resin layer, 
 at least one through-hole contact extending from the wire pattern through the body resin layer, and 
 a solder resist on the upper and lower surfaces of the body resin layer, the solder resist defining openings corresponding to at least one of a solder ball land and a bump land, the solder ball land and the bump land being configured to couple the PCB to a device, wherein
 if the solder ball land is on the wire pattern, the bump land is on the at least one through-hole contact, and 
 if the bump land is on the wire pattern, the solder ball land is on the at least one through-hole contact; 
 
   a semiconductor chip connected to the PCB by wire bonding or flip-chip bonding; and   a sealing member configured to seal the semiconductor chip.   
     
     
         6 . The semiconductor package of  claim 5 , wherein if the wire pattern is on the upper surface of the body resin layer, the bump land is formed in the wire pattern, and if the wire pattern is on the lower surface of the body resin layer, the solder ball land is in the wire pattern. 
     
     
         7 . The semiconductor package of  claim 5 , wherein if the wire pattern is on the lower surface of the body resin layer, the at least one through-hole contact protrudes from the upper surface of the body resin layer, and the semiconductor chip is connected to the at least one through-hole contact through a minute bump in the bump land. 
     
     
         8 . The semiconductor package of  claim 5 , wherein the sealing member is a single material. 
     
     
         9 . The semiconductor package of  claim 5 , wherein the sealing member includes an external sealing resin that covers outer sides of the semiconductor chip and an underfill in a space between the semiconductor chip and the PCB. 
     
     
         10 . The semiconductor package of  claim 5 , wherein the solder balls are formed in the solder ball lands on a lower surface of the PCB. 
     
     
         11 . The semiconductor package of  claim 5 , wherein the semiconductor chip includes at least one of a memory chip and a logic chip. 
     
     
         12 . An electrical and electronic apparatus comprising:
 an input/output unit configured to receive and output data;   an interface unit configured to receive and transmit the data;   a memory unit configured to store the data;   a control unit configured to control at least the input/output unit and the interface unit; and   a bus configured to transmit the data between the input/output unit, the interface unit, memory unit and the control unit,   wherein at least one of the interface unit, the memory unit, and the control unit includes a semiconductor package having,
 a printed circuit board (PCB), the PCB including,
 a body resin layer having lower and upper surfaces, 
 a wire pattern on or in one of the upper and lower surfaces of the body resin layer, 
 at least one through-hole contact extending from the wire pattern through the body resin layer, and 
 a solder resist on the upper and lower surfaces of the body resin layer, the solder resist defining openings corresponding to at least one of a solder ball land and a bump land, the solder ball land and the bump land being configured to couple the PCB to a device, wherein
 if the solder ball land is on the wire pattern, the bump land is on the at least one through-hole contact, and 
 if the bump land is on the wire pattern, the solder ball land is on the at least one through-hole contact, and 
 
 
 a semiconductor chip connected to the PCB by wire bonding or flip-chip bonding; and 
 a sealing member configured to seal the semiconductor chip.