Semiconductor device

Abstract

For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.

1 . A semiconductor device comprising a nonvolatile memory cell, wherein the nonvolatile memory cell includes:
 a semiconductor substrate;   a first insulator film formed over the semiconductor substrate;   a first gate electrode formed over the first insulator film;   a second insulator film formed over the semiconductor substrate, the second insulator film having a charge trap region; and   a second gate electrode formed over the second insulator, the second gate electrode arranged adjacent with the first gate electrode,   wherein a first height from a surface of the semiconductor substrate to an upper surface of the first gate electrode is lower than a second height from a surface of the semiconductor substrate to an upper surface of the second gate electrode.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the charge trap region includes a plurality of crystalline grains. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein the charge trap region includes a silicon nitride film.