Articles having semiconductive carbon nanotubes

Abstract

A process of forming a semiconductive carbon nanotube structure includes imposing energy on a mixture that contains metallic carbon nanotubes and semiconductive carbon nanotubes under conditions to cause the metallic carbon nanotubes to be digested or to decompose so that they may be separated away from the semiconductive carbon nanotubes.

1 . An article comprising:
 a mat of semiconductive carbon nanotubes, wherein the mat contains impurities of less than 1 part per billion for each impurity type and less than 0.01 part per million for all impurities.   
     
     
         2 . The article of  claim 1 , wherein the mat includes a distribution of single-wall carbon nanotubes with a length range from about 0.5 micrometer to about 50 micrometer. 
     
     
         3 . The article of  claim 1 , wherein the mat is disposed on a dielectric substrate. 
     
     
         4 . The article of  claim 1 , wherein one of the impurities comprises residual multi-wall carbon nanotubes. 
     
     
         5 . The article of  claim 1 , wherein the mat is disposed on silicon dioxide. 
     
     
         6 . The article of  claim 1 , wherein the mat has a thickness of about 10 angstroms. 
     
     
         7 . An article comprising:
 a mat having a distribution of single-walled nanotubes of carbon that are essentially 100% pure, the single-walled nanotubes being semiconductive.   
     
     
         8 . The article of  claim 7 , wherein the only detectable impurity is residual multi-wall carbon nanotubes. 
     
     
         9 . The article of  claim 7 , wherein the mat has a thickness in a range from about 10 angstrom to about 10 microns. 
     
     
         10 . The article of  claim 7 , wherein the mat is structured as an aggregated mat of single-walled nanotubes of carbon. 
     
     
         11 . The article of  claim 7 , wherein the mat has been fabricated by separating amorphous carbon from semiconductive single-walled nanotubes of carbon. 
     
     
         12 . The article of  claim 7 , wherein the mat comprises a portion of a semiconductor in a semiconductor on insulator structure. 
     
     
         13 . An article comprising:
 a wafer on which to process a microelectronic device; and   a mat disposed as a portion of the wafer, the mat having a distribution of single-walled nanotubes of carbon are essentially 100% pure, the single-walled nanotubes being semiconductive.   
     
     
         14 . The article of  claim 13 , wherein a trace impurity type is limited to residual multi-wall carbon nanotubes. 
     
     
         15 . The article of  claim 13 , wherein the mat has a thickness in a range of about 1 micron to about 10 microns. 
     
     
         16 . The article of  claim 13 , wherein the mat is structured as an aggregated mat of single-walled nanotubes of carbon.