Routing methods for integrated circuit designs

Abstract

Routing methods for an integrated circuit design layout are disclosed. The layout can include design netlists and library cells. A multiple-level global routing can generate topological wire for each net. An area oriented graph-based detail routing on the design can be performed. A post route optimization after the detail routing can be performed to further improve the routing quality. Some methods can be single threaded all or some of the time, and/or multi-threaded some or all of the time.

1 - 35 . (canceled) 
     
     
         36 - 40 . (canceled) 
     
     
         41 . A method of routing an integrated circuit (IC) design, comprising:
 defining a volume of the IC design, wherein
 a subset of the volume carries wiring; and 
   forming a plurality of nodes in the volume, wherein
 nodes of the plurality of nodes are limited to being formed within the subset of the volume. 
   
     
     
         42 . The method of  claim 41 , wherein
 the routing is multithreaded at least at a first time.   
     
     
         43 . The method of  claim 41 , wherein
 the routing is single threaded at least at a first time.   
     
     
         44 . The method of  claim 41 , wherein
 the volume includes one layer.   
     
     
         45 . The method of  claim 41 , wherein
 the volume includes at least two layers.   
     
     
         46 . A method of routing an integrated circuit (IC) design, comprising:
 accessing one or more routing pitches of one or more layers of the IC design;   defining a volume of the IC design, wherein
 a subset of the volume carries wiring; 
   forming a first plurality of nodes in the volume; and   forming a second plurality of one or more nodes outside the volume, wherein
 at least one node of the second plurality of one or more nodes is formed at a pitch greater than at least one of the one or more routing pitches. 
   
     
     
         47 . The method of  claim 46 , wherein
 the routing is multithreaded at least at a first time.   
     
     
         48 . The method of  claim 46 , wherein
 the routing is single threaded at least at a first time.   
     
     
         49 . The method of  claim 46 , wherein
 the volume includes one layer.   
     
     
         50 . The method of  claim 46 , wherein
 the volume includes at least two layers.   
     
     
         51 - 69 . (canceled)