Inventor · disambiguated record
Limin He
Also filed as: HE LIMIN
15 granted patents·2 pending applications·151 citations·filing 1998–2021
93Inventor score
Files withCADENCE DESIGN SYSTEMS INC6TURINGSENSE INC4HE LIMIN3TRUSTEES STEVENS INST TECH2CHINA PETROLEUM & CHEM CORP1
Top patents by PatentIndex Score
17 records- 0194US10304230B2System and method for capturing and analyzing motions to render a human avatar animationTURINGSENSE INC·Filed 2018·Granted May 28, 2019·16 cites·19 claims
- 0294US10157488B2System and method for capturing and analyzing motionsTURINGSENSE INC·Filed 2016·Granted Dec 18, 2018·18 cites·19 claims
- 0393US10672173B2System and method for capturing and analyzing motions to be sharedTURINGSENSE INC·Filed 2019·Granted Jun 2, 2020·11 cites·18 claims
- 0490US7036101B2Method and apparatus for scalable interconnect solutionCADENCE DESIGN SYSTEMS INC·Filed 2002·Granted Apr 25, 2006·54 cites·42 claims
- 0574US9177093B2Routing interconnect of integrated circuit designs with varying grid densitiesCADENCE DESIGN SYSTEMS INC·Filed 2013·Granted Nov 3, 2015·4 cites·12 claims
- 0670US11238636B2Method and apparatus for sport-specific training with captured body motionsTURINGSENSE INC·Filed 2021·Granted Feb 1, 2022·0 cites·20 claims
- 0770US8386984B2Interconnect routing methods of integrated circuit designsCADENCE DESIGN SYSTEMS INC·Filed 2008·Granted Feb 26, 2013·3 cites·11 claims
- 0868US8255857B2Routing methods for integrated circuit designsHE LIMIN·Filed 2008·Granted Aug 28, 2012·3 cites·13 claims
- 0966US8365128B2Routing interconnect of integrated circuit designsCADENCE DESIGN SYSTEMS INC·Filed 2008·Granted Jan 29, 2013·2 cites·24 claims
- 1066US7594207B2Computationally efficient design rule checking for circuit interconnect routing designCADENCE DESIGN SYSTEMS INC·Filed 2006·Granted Sep 22, 2009·4 cites·28 claims
- 1163US8291365B2Conditionally routing a portion of an integrated circuit design with a different pitch to overcome a design rule violationHE LIMIN·Filed 2006·Granted Oct 16, 2012·2 cites·29 claims
- 1259US7238420B2Alpha AL2O3 NanotemplatesTRUSTEES STEVENS INST TECH·Filed 2004·Granted Jul 3, 2007·4 cites·2 claims
- 1355US2023364580A1Adsorbent composition, and preparation method therefor and application thereofCHINA PETROLEUM & CHEM CORP·Filed 2021·Application pending·0 cites
- 1452US6263478B1System and method for generating and using stage-based constraints for timing-driven designCADENCE DESIGN SYSTEMS INC·Filed 1998·Granted Jul 17, 2001·30 cites·50 claims
- 1550US11595613B2De-interlacing processing method and device, and computer-readable storage mediumZTE CORP·Filed 2019·Granted Feb 28, 2023·0 cites·13 claims
- 1650US2013031524A1Routing methods for integrated circuit designsHE LIMIN·Filed 2012·Application pending·0 cites
- 1737US6808760B2Method for preparing α-dialuminum trioxide nanotemplatesTRUSTEES STEVENS INST TECH·Filed 2002·Granted Oct 26, 2004·0 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →