US2013099357A1PendingUtilityA1

Strain compensated reo buffer for iii-n on silicon

Assignee: DARGIS RYTISPriority: Oct 21, 2011Filed: Oct 21, 2011Published: Apr 25, 2013
Est. expiryOct 21, 2031(~5.3 yrs left)· nominal 20-yr term from priority
H10P 14/3416H10P 14/3411H10P 14/3238H10P 14/3202H10P 14/2905H10D 62/117H10D 62/83H10D 62/8503
48
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Claims

Abstract

A method of fabricating a rare earth oxide buffered III-N on silicon wafer including providing a crystalline silicon substrate, depositing a rare earth oxide structure on the silicon substrate including one or more layers of single crystal rare earth oxide, and depositing a layer of single crystal III-N material on the rare earth oxide structure so as to form an interface between the rare earth oxide structure and the layer of single crystal III-N material. The layer of single crystal III-N material produces a tensile stress at the interface and the rare earth oxide structure has a compressive stress at the interface dependent upon a thickness of the rare earth oxide structure. The rare earth oxide structure is grown with a thickness sufficient to provide a compressive stress offsetting at least a portion of the tensile stress at the interface to substantially reduce bowing in the wafer.

Claims

exact text as granted — not AI-modified
Having fully described the invention in such clear and concise terms as to enable those skilled in the art to understand and practice the same, the invention claimed is: 
     
         1 . A method of fabricating a rare earth oxide buffered semiconductor on silicon wafer comprising the steps of:
 providing a crystalline silicon substrate;   depositing a rare earth oxide structure on the silicon substrate including one or more layers of single crystal rare earth oxide;   depositing a layer of single crystal semiconductor material on the rare earth oxide structure so as to form an interface between the rare earth oxide structure and the layer of single crystal semiconductor material, the layer of single crystal semiconductor material producing one of a tensile stress and a compressive stress at the interface and the rare earth oxide structure having an opposite one of a compressive stress and a tensile stress at the interface dependent upon a thickness of the rare earth oxide structure; and   growing the thickness of the rare earth oxide structure to provide the one of compressive stress and tensile stress offsetting at least a portion of the one of tensile stress and compressive stress at the interface to substantially reduce bowing in the wafer.   
     
     
         2 . A method as claimed in  claim 1  wherein the rare earth oxide structure is grown with a thickness that provides the opposite one of compressive stress and tensile stress approximately equal to the one of tensile stress and compressive stress of the layer of single crystal semiconductor material at the interface, whereby bowing of the silicon wafer is substantially eliminated. 
     
     
         3 . A method as claimed in  claim 1  wherein the step of depositing the rare earth oxide structure includes depositing one of a binary alloy and a ternary alloy. 
     
     
         4 . A method as claimed in  claim 1  wherein the step of depositing the rare earth oxide structure includes depositing two or more layers of different compositions. 
     
     
         5 . A method as claimed in  claim 1  wherein the step of depositing the semiconductor material includes depositing a material including germanium. 
     
     
         6 . A method of fabricating a rare earth oxide buffered III-N on silicon wafer comprising the steps of:
 providing a crystalline silicon substrate;   depositing a rare earth oxide structure on the silicon substrate including one or more layers of single crystal rare earth oxide;   depositing a layer of single crystal III-N material on the rare earth oxide structure so as to form an interface between the rare earth oxide structure and the layer of single crystal III-N material, the layer of single crystal III-N material producing a tensile stress at the interface and the rare earth oxide structure having a compressive stress at the interface dependent upon a thickness of the rare earth oxide structure; and   growing the thickness of the rare earth oxide structure to provide a compressive stress offsetting at least a portion of the tensile stress at the interface to substantially reduce bowing in the wafer.   
     
     
         7 . A method as claimed in  claim 6  wherein the rare earth oxide structure is grown with a thickness that provides a compressive stress approximately equal to the tensile stress of the layer of single crystal III-N material at the interface, whereby bowing of the silicon wafer is substantially eliminated. 
     
     
         8 . A method as claimed in  claim 6  wherein the step of depositing the rare earth oxide structure includes depositing one of a binary alloy and a ternary alloy. 
     
     
         9 . A method as claimed in  claim 6  wherein the step of depositing the rare earth oxide structure includes depositing two or more layers of different compositions. 
     
     
         10 . A method of fabricating a rare earth oxide buffered III-N on silicon wafer comprising the steps of:
 providing a crystalline silicon substrate;   depositing a rare earth oxide structure on the silicon substrate including one or more layers of single crystal rare earth oxide, and at least one of the one or more layers including one of a binary alloy and a ternary alloy;   depositing a layer of single crystal III-N material on the rare earth oxide structure so as to form an interface between the rare earth oxide structure and the layer of single crystal III-N material, the layer of single crystal III-N material producing a tensile stress at the interface and the rare earth oxide structure having a compressive stress at the interface dependent upon a thickness of the rare earth oxide structure; and   growing the rare earth oxide structure with a thickness that provides a compressive stress approximately equal to the tensile stress of the layer of single crystal III-N material at the interface, whereby bowing of the silicon wafer is substantially eliminated.   
     
     
         11 . A method as claimed in  claim 10  wherein the step of depositing the rare earth oxide structure includes depositing two or more layers of different compositions. 
     
     
         12 . Rare earth oxide buffered III-N on silicon wafer comprising:
 a crystalline silicon substrate;   a rare earth oxide structure deposited on the silicon substrate and including one or more layers of single crystal rare earth oxide;   a layer of single crystal III-N material deposited on the rare earth oxide structure so as to form an interface between the rare earth oxide structure and the layer of single crystal III-N material, and the layer of single crystal III-N material producing a tensile stress at the interface; and   the rare earth oxide structure having a compressive stress at the interface dependent upon a thickness of the rare earth oxide structure, and the thickness of the rare earth oxide structure providing a compressive stress offsetting at least a portion of the tensile stress at the interface to substantially reduce bowing in the wafer.   
     
     
         13 . A rare earth oxide buffered III-N on silicon wafer as claimed in  claim 12  wherein the thickness of the rare earth oxide structure provides a compressive stress approximately equal to the tensile stress of the layer of single crystal III-N material at the interface whereby bowing of the silicon wafer is substantially eliminated. 
     
     
         14 . A rare earth oxide buffered III-N on silicon wafer as claimed in  claim 12  wherein the rare earth oxide structure includes one of a binary alloy and a ternary alloy. 
     
     
         15 . A rare earth oxide buffered III-N on silicon wafer as claimed in  claim 12  wherein the rare earth oxide structure include two or more layers of different compositions. 
     
     
         16 . Rare earth oxide buffered semiconductor on silicon wafer comprising:
 a crystalline silicon substrate;   a rare earth oxide structure deposited on the silicon substrate and including one or more layers of single crystal rare earth oxide;   a layer of single crystal semiconductor material deposited on the rare earth oxide structure so as to form an interface between the rare earth oxide structure and the layer of single crystal semiconductor material, and the layer of single crystal semiconductor material producing one of a tensile stress and a compressive stress at the interface; and   the rare earth oxide structure having an opposite one of a compressive stress and a tensile stress at the interface dependent upon a thickness of the rare earth oxide structure, and the thickness of the rare earth oxide structure providing the opposite one of a compressive stress and a tensile stress offsetting at least a portion of the one of tensile stress and compressive stress at the interface to substantially reduce bowing in the wafer.   
     
     
         17 . A rare earth oxide buffered semiconductor on silicon wafer as claimed in  claim 16  wherein the thickness of the rare earth oxide structure provides the opposite one of a compressive stress and a tensile stress approximately equal to the one of tensile stress and compressive stress of the layer of single crystal semiconductor material at the interface whereby bowing of the silicon wafer is substantially eliminated. 
     
     
         18 . A rare earth oxide buffered semiconductor on silicon wafer as claimed in  claim 16  wherein the rare earth oxide structure includes one of a binary alloy and a ternary alloy. 
     
     
         19 . A rare earth oxide buffered semiconductor on silicon wafer as claimed in  claim 16  wherein the rare earth oxide structure include two or more layers of different compositions. 
     
     
         20 . A method as claimed in  claim 16  wherein the layer of single crystal semiconductor material includes germanium.

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