US2013137273A1PendingUtilityA1

Semiconductor Processing System

48
Assignee: ENGELHARDT MANFREDPriority: Nov 28, 2011Filed: Nov 28, 2011Published: May 30, 2013
Est. expiryNov 28, 2031(~5.4 yrs left)· nominal 20-yr term from priority
H10P 72/0421H10P 72/78H10P 50/242H10P 14/6336H10P 72/7624C23C 16/50C23C 14/34C23C 16/5096C23C 16/4583C23C 16/4401
48
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The semiconductor processing system includes a reactor chamber that has an upper wall and a lower wall. A hold member is disposed in the reactor chamber to hold a semiconductor substrate in such a way that it faces the lower wall of the reactor chamber.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor processing system, comprising:
 a reactor chamber comprising an upper wall and a lower wall;   a hold member disposed in the reactor chamber to hold a semiconductor substrate in such a way that the semiconductor substrate faces the lower wall of the reactor chamber.   
     
     
         2 . The semiconductor processing system according to  claim 1 , wherein the upper wall comprises an inlet opening and the lower wall comprises an outlet opening. 
     
     
         3 . The semiconductor processing system according to  claim 2 , wherein the inlet opening is connected to a process gas reservoir. 
     
     
         4 . The semiconductor processing system according to  claim 2 , wherein the outlet opening is connected to an exhaust pump. 
     
     
         5 . The semiconductor processing system according to  claim 1 , further comprising a plasma generation unit coupled to the reactor chamber. 
     
     
         6 . The semiconductor processing system according to  claim 5 , wherein the plasma generation unit is coupled to an inlet opening formed in the upper wall of the reactor chamber. 
     
     
         7 . The semiconductor processing system according to  claim 1 , wherein the hold member comprises a wafer chuck. 
     
     
         8 . The semiconductor processing system according to  claim 1 , further comprising a radio frequency unit connected to the hold member. 
     
     
         9 . The semiconductor processing system according to  claim 8 , further comprising an electrical connection line between the radio frequency unit and the hold member, the electrical connection line fed through an opening in the upper wall of the reactor chamber. 
     
     
         10 . The semiconductor processing system according to  claim 1 , further comprising a magnet to distract material fragments or particles released from the semiconductor substrate. 
     
     
         11 . The semiconductor processing system according to  claim 10 , wherein the magnet is disposed outside the reactor chamber. 
     
     
         12 . A semiconductor processing apparatus, comprising:
 a process chamber; and   a hold member disposed in the process chamber to hold a semiconductor substrate so that an exposed surface of the semiconductor substrate can be processed;   wherein the semiconductor processing apparatus is configured so that in an upright standing position of the semiconductor processing apparatus the exposed surface of the semiconductor substrate is directed downwards.   
     
     
         13 . The semiconductor processing apparatus according to  claim 12 , wherein the hold member comprises a wafer chuck. 
     
     
         14 . The semiconductor processing apparatus according to  claim 12 , further comprising a radio frequency generation unit connected to the hold member. 
     
     
         15 . The semiconductor processing apparatus according to  claim 14 , wherein
 the hold member comprises a first main surface to hold the semiconductor substrate thereupon and a second main surface opposite to the first main surface, and   the radio frequency generator unit is connected to the second main surface of the hold member.   
     
     
         16 . The semiconductor processing apparatus according to  claim 12 , wherein
 the process chamber comprises an upper wall and an opposite lower wall, and   an inlet opening is formed in the upper wall and an outlet opening is formed in the lower wall.   
     
     
         17 . The semiconductor processing apparatus according to  claim 16 , wherein the inlet opening is connected to a process gas reservoir. 
     
     
         18 . The semiconductor processing apparatus according to  claim 16 , wherein the outlet opening is connected to an exhaust pump. 
     
     
         19 . The semiconductor processing apparatus according to  claim 12 , further comprising a plasma generation unit coupled to the process chamber. 
     
     
         20 . The semiconductor processing apparatus according to  claim 12 , further comprising a magnet disposed in such a way so as to distract material fragments or particles released from the exposed surface of the semiconductor substrate. 
     
     
         21 . The semiconductor processing apparatus according to  claim 20 , wherein one of the poles of the magnet faces the semiconductor substrate. 
     
     
         22 . A method for processing a semiconductor substrate, the method comprising:
 providing a reactor chamber comprising an upper wall and a lower wall and a hold member to hold a semiconductor substrate to be processed;   placing the semiconductor substrate onto the hold member in such a way that it faces the lower wall of the reactor chamber; and   processing the semiconductor substrate while the semiconductor substrate faces the lower wall of the reactor chamber.   
     
     
         23 . The method according to  claim 22 , wherein processing the semiconductor substrate comprises feeding a process gas into the reactor chamber. 
     
     
         24 . The method according to  claim 22 , wherein processing the semiconductor substrate comprises feeding a radio frequency signal into the reactor chamber. 
     
     
         25 . The method according to  claim 22 , wherein processing the semiconductor substrate comprises feeding a plasma gas into the reactor chamber.

Cited by (0)

No later patents cite this yet.

References (0)

No backward citations on record.