US2013181231A1PendingUtilityA1

Micropipe-free silicon carbide and related method of manufacture

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Assignee: CREE INCPriority: Sep 14, 2006Filed: Mar 4, 2013Published: Jul 18, 2013
Est. expirySep 14, 2026(~0.2 yrs left)· nominal 20-yr term from priority
H10P 14/3416H10P 14/3408H10P 14/2926H10P 14/2904H10P 14/22H10P 14/20C30B 23/002C30B 23/005Y10T428/21C30B 29/36H10D 62/8325H01L 29/1608
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Claims

Abstract

Micropipe-free, single crystal, silicon carbide (SiC) and related methods of manufacture are disclosed. The SiC is grown by placing a source material and seed material on a seed holder in a reaction crucible of the sublimation system, wherein constituent components of the sublimation system including the source material, reaction crucible, and seed holder are substantially free from unintentional impurities. By controlling growth temperature, growth pressure, SiC sublimation flux and composition, and a temperature gradient between the source material and the seed material or the SiC crystal growing on the seed material during the PVT process, micropipe-inducing process instabilities are eliminated and micropipe-free SiC crystal is grown on the seed material.

Claims

exact text as granted — not AI-modified
1 - 31 . (canceled) 
     
     
         32 . A semiconductor wafer comprising:
 a micropipe-free silicon carbide (SiC) wafer sliced from a SiC crystal grown in the nominal c-axis direction without a-face growth, the SiC crystal having a micropipe density of zero, the SiC wafer comprising opposing first and second surfaces;   an epitaxial layer formed on at least the first surface of the SiC substrate and comprising a concentration of dopant atoms defining a conductivity for the epitaxial layer; and   a semiconductor device comprising source/drain regions formed in the epitaxial layer and defining a channel region in the epitaxial layer.   
     
     
         33 . The semiconductor wafer of  claim 32 , further comprising: a gate dielectric layer formed on the channel region; and
 a metal gate structure formed on the gate dielectric layer over the channel region.   
     
     
         34 . The semiconductor wafer of  claim 32 , wherein the semiconductor device comprises at least one of a junction field-effect transistor and a hetero-field effect transistor. 
     
     
         35 . The semiconductor wafer of  claim 32 , wherein the SiC wafer has a minimum diameter selected from a group of diameters consisting of at least 2 inches, at least 3 inches, and at least 100 mm to 150 mm. 
     
     
         36 . A semiconductor wafer comprising:
 a micropipe-free silicon carbide (SiC) wafer sliced from a SiC crystal grown in the nominal c-axis direction without a-face growth, the SiC crystal having a micropipe density of zero, the SiC wafer comprising opposing first and second surfaces;   an epitaxial layer formed on at least the first surface of the SiC substrate and comprising a concentration of dopant atoms defining a conductivity for the epitaxial layer; and   a semiconductor device formed at least in part in the epitaxial layer.   
     
     
         37 . The semiconductor wafer of  claim 36 , wherein the semiconductor device comprises at least one of a Schottky barrier diode, a junction barrier Schottky diode, a thyristor, a bipolar junction transistor, and a PiN diode. 
     
     
         38 . The semiconductor wafer of  claim 36 , wherein the SiC wafer has a minimum diameter selected from a group of diameters consisting of at least 2 inches, at least 3 inches, and at least 100 mm to 150 mm. 
     
     
         39 . (canceled) 
     
     
         40 . A semiconductor wafer comprising:
 a micropipe-free silicon carbide (SiC) wafer sliced from a crystal having a minimum diameter of 3 inches to 150 mm and a micropipe density of zero, the SiC wafer comprising opposing first and second surfaces; and   an epitaxial layer formed on at least the first surface of the SiC substrate and comprising a concentration of dopant atoms defining a conductivity for the epitaxial layer.   
     
     
         41 . The semiconductor wafer of  claim 40 , further comprising a semiconductor device comprising source/drain regions formed in the epitaxial layer and defining a channel region in the epitaxial layer. 
     
     
         42 . The semiconductor wafer of  claim 41 , wherein the semiconductor device comprises at least one of a junction field-effect transistor and a hetero-field effect transistor. 
     
     
         43 . The semiconductor wafer of  claim 40 , further comprising a semiconductor device formed at least in part in the epitaxial layer, wherein the semiconductor device comprises at least one of a Schottky barrier diode, a junction barrier Schottky diode, a thyristor, a bipolar junction transistor, and a PiN diode. 
     
     
         49 . The semiconductor wafer of  claim 32 , wherein the micropipe-free SiC wafer has a diameter of at least 100 mm to 150 mm. 
     
     
         50 . The semiconductor wafer of  claim 32 , wherein the micropipe-free SiC wafer has a diameter of at least 100 mm to 125 mm. 
     
     
         51 . The semiconductor wafer of  claim 36 , wherein the micropipe-free SiC wafer has a diameter of at least 100 mm to 150 mm. 
     
     
         52 . The semiconductor wafer of  claim 36 , wherein the micropipe-free SiC wafer has a diameter of at least 100 mm to 125 mm. 
     
     
         53 . The semiconductor wafer of  claim 40 , wherein the micropipe-free SiC wafer has a diameter of at least 100 mm to 150 mm. 
     
     
         54 . The semiconductor wafer of  claim 40 , wherein the micropipe-free SiC wafer has a diameter of at least 100 mm to 125 mm. 
     
     
         55 . The micropipe-free SiC wafer of claim  44 , wherein the micropipe-free SiC wafer has a diameter of at least 100 mm to 125 mm. 
     
     
         56 . A micropipe-free silicon carbide (SiC) wafer having a micropipe density of zero wherein the micropipe-free SiC wafer has a diameter of at least 100 mm to 150 mm.

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