Circuit board

Abstract

A circuit board includes a circuit substrate, a first dielectric layer, a first conductive layer, a second conductive layer and a second dielectric layer. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer, and an intaglio pattern. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via. The second conductive layer is electrically connected to the first circuit layer via the first conductive layer. The second dielectric layer is disposed on the first dielectric layer and covers the second conductive layer and the second surface of the first dielectric layer.

What is claimed is: 
     
         1 . A circuit board comprising:
 a circuit substrate having a first surface and a first circuit layer;   a first dielectric layer disposed on the circuit substrate and covering the first surface and the first circuit layer, the dielectric layer having a second surface, at least a blind via extending from the second surface to the first circuit layer, and an intaglio pattern;   a first conductive layer disposed in the at least a blind via;   a second conductive layer disposed in the intaglio pattern and the at least a blind via and covering the first conductive layer, the second conductive layer being electrically connected to the first circuit layer via the first conductive layer; and   a second dielectric layer disposed on the first dielectric layer and coving the second conductive layer and the second surface of the first dielectric layer.   
     
     
         2 . The circuit board as claimed in  claim 1 , wherein a height of the at least a blind via is denoted as H and a thickness of the first conductive layer is denoted as h, and a relationship between h and H complies with 0.2≦(h/H)≦0.9. 
     
     
         3 . The circuit board as claimed in  claim 1 , further comprising an activation layer disposed between the intaglio pattern of the first dielectric layer and the second conductive layer and between the first conductive layer and the second conductive layer. 
     
     
         4 . The circuit board as claimed in  claim 1 , wherein the first circuit layer is embedded into the circuit substrate, and a surface of the first circuit layer and the first surface on the circuit substrate are substantially aligned. 
     
     
         5 . The circuit board as claimed in  claim 1 , wherein the first circuit layer is disposed on the first surface of the circuit substrate. 
     
     
         6 . The circuit board as claimed in  claim 1 , wherein materials of the first dielectric layer and the second dielectric layer are the same. 
     
     
         7 . The circuit board as claimed in  claim 1 , wherein materials of the first dielectric layer and the second dielectric layer are different from each other.