US2013214360A1PendingUtilityA1

Method and apparatus for reducing flicker noise in a semiconductor device

Assignee: INFINEON TECHNOLOGIES AGPriority: Aug 30, 2006Filed: Feb 11, 2013Published: Aug 22, 2013
Est. expiryAug 30, 2026(~0 yrs left)· nominal 20-yr term from priority
Inventors:Domagoj Siprak
H10D 30/6211H10D 86/215H10D 86/011H10D 30/6213H10D 30/0241H10D 30/62H01L 29/785
50
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Claims

Abstract

Some embodiments discussed relate to an integrated circuit and methods for making it. Certain examples can include a fin, a gate insulator over a sidewall of the fin, and a noise-reducing dopant at or near an interface of the gate insulator and the sidewall.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A transistor comprising:
 a fin;   a gate insulator over a sidewall of the fin; and   a noise-reducing dopant at or near an interface of the gate insulator and the sidewall.   
     
     
         2 . The transistor of  claim 1 , including a gate stack disposed over the gate insulator. 
     
     
         3 . The transistor of  claim 2 , wherein the gate stack includes a member selected from the group consisting of polysilicon gate, fully silicided gate and metal gate. 
     
     
         4 . The transistor of  claim 1 , wherein said gate insulator comprises a high-k material. 
     
     
         5 . The transistor of  claim 1 , further comprising a metal gate on the gate insulator, the gate insulator including a high-k material. 
     
     
         6 . The transistor of  claim 1 , wherein the noise-reducing dopant includes at least one of fluorine or chlorine. 
     
     
         7 . The transistor of  claim 1 , wherein the fin is a silicon fin. 
     
     
         8 . A transistor comprising:
 a fin;   a gate insulator over a sidewall of the fin; and   a noise-reducing dopant in the gate insulator and in the fin.   
     
     
         9 . The transistor of  claim 8 , including a gate stack disposed over the gate insulator. 
     
     
         10 . The transistor of  claim 9 , wherein the gate stack includes a member selected from the group consisting of polysilicon gate, fully silicided gate and metal gate. 
     
     
         11 . The transistor of  claim 8 , wherein said gate insulator comprises a high-k material. 
     
     
         12 . The transistor of  claim 8 , further comprising a metal gate on the gate insulator, the gate insulator including a high-k material. 
     
     
         13 . The transistor of  claim 8 , wherein the noise-reducing dopant includes at least one of fluorine or chlorine. 
     
     
         14 . The transistor of  claim 8 , wherein the fin is a silicon fin. 
     
     
         15 . The transistor of  claim 8 , wherein the noise-reducing dopant is within a sidewall of the fin. 
     
     
         16 . A transistor comprising:
 a fin;   a gate insulator over a sidewall of the fin; and   a dopant at or near an interface of the gate insulator and the sidewall, the dopant being at least one of fluorine or chlorine.   
     
     
         17 . The transistor of  claim 16 , including a gate stack disposed over the gate insulator. 
     
     
         18 . The transistor of  claim 17 , wherein the gate stack includes a member selected from the group consisting of polysilicon gate, fully silicided gate and metal gate. 
     
     
         19 . The transistor of  claim 16 , wherein said gate insulator comprises a high-k material. 
     
     
         20 . The transistor of  claim 16 , further comprising a metal gate on the gate insulator, the gate insulator including a high-k material. 
     
     
         21 . The transistor of  claim 16 , wherein the fin is a silicon fin. 
     
     
         22 . A transistor comprising:
 a fin;   a gate insulator on a sidewall of the fin; and   a dopant in the gate insulator and in the fin, the dopant being at least one of fluorine or chlorine.   
     
     
         23 . The transistor of  claim 22 , including a gate stack disposed on the gate insulator. 
     
     
         24 . The transistor of  claim 23 , wherein the gate stack includes a member selected from the group consisting of polysilicon gate, fully silicided gate and metal gate. 
     
     
         25 . The transistor of  claim 22 , wherein said gate insulator comprises a high-k material. 
     
     
         26 . The transistor of  claim 22 , further comprising a metal gate on the gate insulator, the gate insulator including a high-k material. 
     
     
         27 . The transistor of  claim 22 , wherein the fin is a silicon fin. 
     
     
         28 . The transistor of  claim 22 , wherein the dopant is at or near a sidewall of the fin.

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