US2013294042A1PendingUtilityA1
Methods and apparatus for connecting planar power electronics devices
Est. expiryMay 7, 2032(~5.8 yrs left)· nominal 20-yr term from priority
H10W 72/5524H10W 72/522H10W 72/552H10W 72/884H10W 72/07551H10W 72/07331H10W 72/354H10W 72/352H10W 72/325H10W 72/01323H10W 90/734H10W 74/111H10W 72/50H10W 72/5525H10W 72/5522H10W 72/555H10W 72/553H10W 90/00H01L 25/00
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Claims
Abstract
The present disclosure teaches a power module that includes a chip, a first substrate, and one or more electrically conductive inserts disposed between the chip and the first substrate. The inserts can be corrugated metal sheets, metal tubes, metal wires, or metal rods. One or more of those inserts form a layer in the planar direction of a first interstitial space between the chip and the first substrate.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A power module comprising:
a chip; a first substrate; and one or more electrically conductive inserts disposed between the chip and the first substrate, wherein said one or more inserts form a layer in a planar direction of a first interstitial space between the chip and the first substrate.
2 . The power module of claim 1 , further comprising a second substrate, wherein the second substrate is disposed on the opposite side of the chip from the first substrate and one or more inserts form a layer in a planar direction of a second interstitial space between the chip and the second substrate.
3 . The power module of claim 1 , wherein the insert is a corrugated metal sheet.
4 . The power module of claim 1 , wherein the insert is a metal tube, metal wire, or metal rod.
5 . The power module of claim 4 , wherein a plurality of inserts are adapted to form a layer in the planar direction of the interstitial space between the chip and the substrate.
6 . The power module of claim 4 , wherein the insert has a serpentine shape.
7 . The power module of claim 1 , wherein the insert is compressed between the chip and the substrate.
8 . The power module of claim 1 , wherein the insert is made of a material chosen from aluminum, copper, silver, gold, or combinations thereof.
9 . The power module of claim 1 , wherein the insert is affixed in place using a bonding material.
10 . The power module of claim 9 , wherein the bonding material is chosen from solders, epoxy materials, bonding materials suitable for transient liquid bonding, or bonding materials comprising fine particles of metals or metal alloys.
11 . The power module of claim 10 , wherein the bonding material comprises nano-sized silver particles.
12 . The power module of claim 1 , further comprising an encapsulation material, wherein the encapsulation material is selected from the group consisting of silicone, flexibilized epoxy, thermosetting polymer, flouropolymer, thermoplastic polymer, polyimide, polymer or metal foams and combinations or composites thereof.
13 . The power module of claim 1 , wherein a plurality of inserts form more than one layers disposed in the interstitial space between the chip and the substrate.
14 . A method for connecting a chip and a substrate, comprising:
obtaining one or more metal inserts; and affixing said one or more inserts between the substrate and the chip using a bonding material so that one or more inserts form a layer in an interstitial space between the substrate and the chip.
15 . The method of claim 14 , further comprising:
applying an encapsulation material between the substrate and the chip.
16 . The method of claim 11 , wherein the insert is chosen from a corrugated metal sheet, a metal tube, a metal wire, or a metal rod.
17 . The method of claim 14 , wherein the layer comprises a plurality of metal wires, metal tubes, metal rods, or a combination thereof.
18 . The method of claim 17 , wherein the layer is a corrugated metal sheet.
19 . The method of claim 14 , wherein more than one layer of inserts are disposed in the interstitial space between the chip and the substrate.
20 . The method of claim 14 , wherein inserts is attached to the substrate by sintered silver.Join the waitlist — get patent alerts
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