US2013307134A1PendingUtilityA1
Conductive chip disposed on lead semiconductor package and methods of making the same
Est. expiryJul 6, 2031(~4.9 yrs left)· nominal 20-yr term from priority
H10W 90/756H10W 72/5363H10W 72/536H10W 74/111H10W 74/016H10W 70/464H10W 70/424H10W 70/415H10W 74/00H01L 21/565H01L 23/28
49
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Claims
Abstract
In one implementation, a method of forming a conductive device can include depositing a non-conductive epoxy on a first portion of a lower surface of a semiconductor die, and can include depositing a conductive epoxy on a second portion of the lower surface of the semiconductor die.
Claims
exact text as granted — not AI-modified1 .- 13 . (canceled)
14 . A method of forming a conductive device, comprising:
depositing a non-conductive epoxy on a first portion of a lower surface of a semiconductor die; and depositing a conductive epoxy on a second portion of the lower surface of the semiconductor die.
15 . The method of claim 14 , further comprising:
disposing at least a portion of a lead within a portion of the non-conductive epoxy after the deposing of the non-conductive epoxy.
16 . The method of claim 14 , further comprising:
melting a portion of the non-conductive epoxy; and disposing at least a portion of a lead within the portion of the non-conductive epoxy.
17 . The method of claim 14 , wherein the depositing a non-conductive epoxy on a first portion of a lower surface of a semiconductor die includes placing a stencil proximate the lower surface of the semiconductor die.
18 . The method of claim 14 , wherein the depositing a non-conductive epoxy on a first portion of a lower surface of a semiconductor die includes placing a first stencil proximate the lower surface of the semiconductor die, the depositing a conductive epoxy on a second portion of the lower surface of the semiconductor die includes placing a second stencil proximate the lower surface of the semiconductor die.
19 . The method of claim 14 , further comprising:
disposing a molding material about at least a portion of the semiconductor die.
20 . The method of claim 14 , further comprising:
disposing a molding material about at least a portion of the semiconductor die such that the conductive epoxy is disposed outside of the molding.
21 . A method, comprising:
forming a semiconductor die having an upper surface and a lower surface opposite the upper surface; forming a lead electrically coupled to the upper surface of the semiconductor die; depositing a non-conductive material on a first portion of the lower surface of the semiconductor die; and depositing a conductive material on a second portion of the lower surface of the semiconductor die.
22 . The method of claim 21 , wherein a wire of conductive material extends from the lead to the upper surface of the semiconductor die to electrically couple the lead to the upper surface of the semiconductor die.
23 . The method of claim 21 , wherein the semiconductor die is a vertical transistor.
24 . The method of claim 21 , wherein the semiconductor die includes an epitaxial layer, a vertical axis disposed perpendicular to the epitaxial layer extends though a portion of the epitaxial layer, a portion of the semiconductor die, a portion of the non-conductive material, and a portion of the lead.
25 . The method of claim 21 , wherein the lead includes an upper surface, a portion of the non-conductive material being disposed between the upper surface of the lead and the lower surface of the semiconductor die.
26 . The method of claim 21 , wherein the lead is a first lead and is electrically coupled to the semiconductor die adjacent a first side of the semiconductor die,
the method further comprising: forming a second lead electrically coupled to the upper surface of the semiconductor die adjacent a second side of the semiconductor die, the second side of the semiconductor die being opposite the first side of the semiconductor die, a distance between the first side of the semiconductor die and the second side of the semiconductor die being greater than a distance between the first lead and the second lead.
27 . The method of claim 21 , further comprising:
forming a housing containing at least a portion of the semiconductor die, the conductive material extending from the lower surface to a location outside of the housing.
28 . The method of claim 21 , wherein a horizontal axis extends substantially parallel to the lower surface of the semiconductor die, the horizontal axis extends through a portion of the non-conductive material and through a portion of the conductive material.
29 . The method of claim 21 , wherein the semiconductor die includes a drain contact disposed proximate the lower surface of the semiconductor die.
30 . A method, comprising:
forming a semiconductor die including a vertical transistor device having an upper surface and a lower surface opposite the upper surface; forming a lead having an upper surface being electrically coupled to the upper surface of the semiconductor die; and forming a non-conductive material on a portion of the lower surface of the semiconductor die.
31 . The method of claim 30 , wherein at least a portion of the non-conductive material is disposed between the lower surface of the semiconductor die and the upper surface of the lead.
32 . The method of claim 30 , further comprising:
forming a conductive material disposed on a portion of the lower surface of the semiconductor die.
33 . The method of claim 30 , wherein a wire of conductive material extends from the upper surface of the lead to the upper surface of the semiconductor die to electrically couple the upper surface of the lead to the upper surface of the semiconductor die.
34 . The method of claim 30 , further comprising:
forming an epitaxial layer, a vertical axis disposed perpendicular to the epitaxial layer extends though a portion of the epitaxial layer, a portion of the semiconductor die, a portion of the non-conductive material, and a portion of the lead.
35 . The method of claim 30 , wherein the lead is a first lead and is electrically coupled to the semiconductor die adjacent a first side of the semiconductor die,
the method further comprising: forming a second lead electrically coupled to the upper surface of the semiconductor die adjacent a second side of the semiconductor die, the second side of the semiconductor die being opposite the first side of the semiconductor die, a distance between the first side of the semiconductor die and the second side of the semiconductor die being greater than a distance between the first lead and the second lead.Join the waitlist — get patent alerts
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