Circuit board

Abstract

A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer.

What is claimed is: 
     
         1 . A circuit board, comprising:
 a circuit substrate having a first surface and a first circuit layer;   a dielectric layer disposed on the circuit substrate and covering the first surface and the first circuit layer, wherein the dielectric layer has a second surface, at least a blind via extended form the second surface to the first circuit layer and an intaglio pattern;   a first conductive layer disposed in the blind via; and   a second conductive layer disposed in the intaglio pattern and the blind via, and covering the first conductive layer, wherein the second conductive layer is electrically connected to the first circuit layer through the first conductive layer.   
     
     
         2 . The circuit board as claimed in  claim 1 , wherein a height of the blind via is denoted as H and a thickness of the first conductive layer is denoted as h, and a relationship between h and H complies with 0.2≦(h/H)≦0.9. 
     
     
         3 . The circuit board as claimed in  claim 1 , wherein the intaglio pattern is connected to the blind via. 
     
     
         4 . The circuit board as claimed in  claim 1 , further comprising an activation layer disposed between the intaglio pattern of the dielectric layer and the second conductive layer and disposed between the first conductive layer and the second conductive layer. 
     
     
         5 . The circuit board as claimed in  claim 1 , wherein the first circuit layer is embedded in the circuit substrate, and a surface of the first circuit layer is substantially aligned to the first surface. 
     
     
         6 . The circuit board as claimed in  claim 1 , wherein the first circuit layer is disposed on the first surface of the circuit substrate. 
     
     
         7 . The circuit board as claimed in  claim 1 , wherein the second conductive layer is substantially aligned to the second surface of the dielectric layer.