US2014145565A1PendingUtilityA1
Electronic Assembly Group and Method for Producing the Same
Est. expiryJun 21, 2031(~4.9 yrs left)· nominal 20-yr term from priority
H10W 72/874H10W 90/734H10W 90/724H10W 70/60H10W 70/09H10W 44/501H02K 9/227H05K 2201/0397H05K 3/4092H05K 3/3442H05K 3/0061H05K 1/184H05K 1/18H01G 2/065H05K 2201/10015H05K 2201/10022H02K 11/30H05K 1/0271H05K 3/30H05K 3/40H05K 3/4038H05K 2203/0228H05K 1/0204H05K 2201/1003H02K 11/33H05K 3/0044H05K 1/185H05K 3/4602H02K 11/0068H02K 9/22
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Claims
Abstract
An electronic assembly group comprising a printed circuit board structure in a multilayer configuration that has at least two electrically conductive layers. The electronic assembly group also comprises an additional passive component that is connected to the two electrically conductive layers, each of which has at least one segment that extends beyond the multilayer structure to form connection regions, the passive component making contact directly at the connection regions.
Claims
exact text as granted — not AI-modifiedWe claim:
1 . An electronic assembly group comprising:
a printed circuit board structure with a multilayer structure having at least two electrically conductive layers; an additional passive component which is connected to the two electrically conductive layers; wherein each of the two electrically conductive layers has at least one segment that extends beyond the multilayer structure to form connection regions, and the passive component making contact directly at the connection regions.
2 . The electronic assembly group according to claim 1 , wherein the multilayer printed circuit board structure comprises at least one electrically conductive carrier layer having a semiconductor element and at least one further electrically conductive layer which is connected to the semiconductor element.
3 . The electronic assembly group according to claim 1 , wherein the additional passive element is a capacitor or an inductor.
4 . The electronic assembly group) according to claim 3 , wherein the capacitor is an annular capacitor surrounding the multilayer printed circuit board structure.
5 . The electronic assembly group according to claim 3 , wherein a load inductor directly connected to connection regions is provided.
6 . The electronic assembly group according to claim 1 , wherein the multilayer printed circuit board structure is connected to a heat sink.
7 . The electronic component according to claim 5 , wherein the load inductor is directly connected to the heat sink.
8 . The electronic assembly group according to claim 1 , the electronic assembly group is mounted or potted in a casting jacket.
9 . The electronic assembly group according to claim 1 , wherein at least one of the connection regions comprises at least one recess with a contact pad) contained therein for making contact with a passive component.
10 . The electronic assembly group according to claim 9 , wherein the contact pad is configured to make direct contact with the Schoop layer of a foil capacitor.
11 . The electronic assembly group according to claim 9 , wherein the contact pad is electrically connected to the connection region by means of at least one holding web.
12 . The electronic assembly group according to claim 11 , wherein the holding web is designed so as to compensate for any mechanical stress that occurs when the assembly is in operation.
13 . An arrangement consisting of a multilayer printed circuit structure having at least one integrated power semiconductor and an additional passive component, wherein connection regions for the passive component are routed directly out of the multilayer printed circuit board structure and connected directly to the passive component.
14 . An electric motor comprising:
an electronic assembly group according to claim 1 designed as a rectifier/inverter, wherein in order to form a heat sink the multilayer printed circuit board structure is directly mounted on a cooling region of the electric motor.
15 . A method for producing an electronic assembly group, the method comprising the following steps:
providing a multilayer printed circuit board structure comprising an electrically conductive carrier layer and at least one further electrically conductive layer, the layers having layer sections projecting beyond a core region of the multilayer structure; removing at least partially layer sections projecting beyond the core region (K) which are not needed as connection regions; removing at least partially prepreg layer sections projecting beyond the core region; forming connection regions on the remaining layer sections projecting beyond the core region; and making direct contact between a passive element and the connection regions.
16 . The method according to claim 15 , wherein the step of forming the connection regions comprises the step of bending the remaining layer sections projecting beyond the core region.
17 . The method according to claim 15 , wherein prior to the step of at least partially removing the layer sections projecting beyond the core region which are not required as connection regions, the following steps are performed:
producing a through-contact between a projecting layer section of the further electrically conductive layer and a projecting layer section of the carrier layer; and separating the projecting layer section of the further electrically conductive layer from the further electrically conductive layer.
18 . The method according to claim 15 , wherein the two steps of partially removing are carried out as follows:
forming a bending region on either side of the core region by performing limited removal of all layers, with the exception of the connection regions, by means of deep milling.
19 . The method according to claim 15 , wherein, following the steps of partially removing, any remaining regions with layer sequences below the connection regions act as spacers with respect to a housing surrounding the electronic assembly group.
20 . The method according to claim 15 , wherein separating means for mechanically removing the prepreg layer sections from the future connection regions are provided between the projecting layer sections and their adjacent prepreg layer sections.
21 . The method according to claim 15 , wherein the removal of the layer sections which are not required as a connection region is carried out by etching, and the removal of the prepreg layer sections projecting beyond the core region is carried out by milling.
22 . The method according to claim 15 , wherein the layer sections projecting beyond the core region which are not required as a connection region and the prepreg layer sections projecting beyond the core region are substantially removed in full.Cited by (0)
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