Semiconductor device comprising string structures formed on active region

Abstract

A semiconductor device having a string gate structure and a method of manufacturing the same suppress leakage current. The semiconductor device includes a selection gate and a memory gate. The channel region of the selection gate has a higher impurity concentration than that of the memory gate. Impurities may be implanted at different angles to form the channel regions having different impurity concentrations.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device, comprising:
 providing an active region;   forming a string of gates including a string selection gate, a ground selection gate and memory gates between the string selection gate and the ground selection gate; and   forming a first doping region of a first type in the active region adjacent to at least one of the string and ground selection gates,   wherein the first doping region has a higher concentration of impurities than a portion of the active region adjacent to the memory gates.   
     
     
         2 . The method as set forth in  claim 1 , wherein the active region is doped by impurities of the first type. 
     
     
         3 . The method as set forth in  claim 1 , wherein the forming of the first doping region is performed before forming the string of the gates. 
     
     
         4 . The method as set forth in  claim 1 , wherein the forming of the first doping region is performed by an oblique implantation process. 
     
     
         5 . The method as set forth in  claim 1 , wherein the forming of the string of gates comprises forming two neighboring string selection gates, such that a first distance between neighboring memory gates is shorter than a second distance between the neighboring string selection gates, and
 the forming of the first doping region comprises determining an angle of implantation based on the first distance and the second distance, and implanting impurities into the active region at said angle of implantation relative to the surface of the active region.   
     
     
         6 . The method as set forth in  claim 1 , wherein the first doping region is formed by an oblique implantation process at an impurity-implanted angle of less than 90 degrees relative to the surface of the active region. 
     
     
         7 . The method as set forth in  claim 1 , wherein the first doping region is not overlapped with any of the memory gates in a first direction, the first direction being perpendicular to a surface of the active region. 
     
     
         8 . The method as set forth in  claim 1 , further comprising, before the forming of the first doping region, forming second doping regions in the active region adjacent to the memory gates, respectively, wherein the second doping regions are doped by impurities of the first type with a lower concentration than the first doping region. 
     
     
         9 . The method as set forth in  claim 8 , further comprising forming third doping regions in the active region between the string selection gate and a memory gate among the memory gates adjacent to the string selection gate and between the ground selection gate and another memory gate among the memory gates adjacent to the ground selection gate, wherein the third doping regions are doped by impurities of a second type which is different from the first type. 
     
     
         10 . The method as set forth in  claim 8 , wherein the first doping region is formed to be deeper than the second doping regions. 
     
     
         11 . The method as set forth in  claim 10 , wherein the first doping region is formed to be vertically overlapped with the string and ground selection gates and to be extended outwardly from the string of the gates, and
 the second doping regions are formed to be disposed at the active region between the memory gates, between the string selection gate and a memory gate among the memory gates adjacent to the string selection gate and between the ground selection gate and another memory gate among the memory gates adjacent to the ground selection gate and to be extended outwardly from the string of the gates.   
     
     
         12 . The method as set forth in  claim 11 , wherein the second doping regions are formed to be absent from the active region below centers of the memory gates, the string selection gate and the ground selection gate. 
     
     
         13 . The method as set forth in  claim 12 , wherein the second doping regions are formed to be absent from the active region below centers of spaces between the memory gates, between the string selection gate and a memory gate adjacent to the string selection gate and between the ground selection gate and another memory gate adjacent to the ground selection gate. 
     
     
         14 . The method as set forth in  claim 3 , wherein the active region includes selection gate regions where the string and ground selection gates are disposed and a memory gate region where the memory gates are disposed and selection gate regions between the selection gate regions, and
 the forming of the first doping region comprises:   forming a mask pattern to cover the memory gate region and to expose selection gate regions on the active region; and   performing an impurity-implantation process using the mask.   
     
     
         15 . The method as set forth in  claim 14 , wherein the impurity-implantation process is an oblique implantation process, and the first doping region is formed to be extended under the mask pattern. 
     
     
         16 . The method as set forth in  claim 1 , wherein at least one of the memory gates is formed to include a first memory insulating layer, a charge storage layer, a second memory insulating layer, and a conductive layer which are sequentially disposed.