US2014183625A1PendingUtilityA1

Semiconductor Device

63
Assignee: MAXPOWER SEMICONDUCTOR INCPriority: Jan 9, 2007Filed: Dec 5, 2013Published: Jul 3, 2014
Est. expiryJan 9, 2027(~0.5 yrs left)· nominal 20-yr term from priority
H10P 30/222H10P 95/90H10P 50/642H10P 30/225H10P 30/20H10P 14/69433H10P 14/69215H10P 14/6518H10P 14/29H10D 64/013H10W 10/17H10W 10/014H10D 30/603H10D 30/63H10D 30/663H10D 30/66H10D 30/0297H10D 64/118H10D 62/116H10D 84/0195H10D 30/668H10D 84/038H10D 64/516H10D 64/513H10D 62/393H10D 62/157H10D 62/151H10D 62/127H10D 62/126H10D 62/106H10D 62/104H10D 62/115H10D 62/111H10D 30/665H10D 30/0217H10D 30/025H10P 14/63H01L 29/7827
63
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Claims

Abstract

A semiconductor device includes a semiconductor layer of a first conductivity type having a first surface and a second surface, a source region disposed on the first surface, a gate region disposed on the first surface adjacent the source region, and a drain region disposed on the first surface. The semiconductor device also includes a pair of charge control trenches disposed between the gate region and the drain region. Each of the pair of charge control trenches is characterized by a width and includes a first dielectric material disposed therein and a second material disposed internal to the first dielectric material. Additionally, a concentration of doping impurities present in the semiconductor layer of the first conductivity type and a distance between the pair of charge control trenches define an electrical characteristic of the semiconductor device that is independent of the width of each of the pair of charge control trenches.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a semiconductor layer of a first conductivity type having a first surface and a second surface;   a source region disposed on the first surface; a gate region disposed on the first surface adjacent the source region;   a drain region disposed on the first surface;   and at least a pair of charge control trenches disposed between the gate region and the drain region, wherein each of the at least a pair of charge control trenches is characterized by a width and includes a first dielectric material disposed therein and a second material disposed internal to the first dielectric material and wherein a concentration of doping impurities present in the semiconductor layer of the first conductivity type and a distance between the at least a pair of charge control trenches define an electrical characteristic of the semiconductor device that is independent of the width of each of the at least a pair of charge control trenches.   
     
     
         2 - 31 . (canceled)

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