US2014206142A1PendingUtilityA1

Flip-chip wafer level package and methods thereof

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Assignee: MEYER THORSTENPriority: Dec 31, 2012Filed: Mar 26, 2014Published: Jul 24, 2014
Est. expiryDec 31, 2032(~6.5 yrs left)· nominal 20-yr term from priority
Inventors:Thorsten Meyer
H10W 74/00H10W 90/271H10W 90/20H10W 70/099H10W 72/073H10W 72/072H10W 72/884H10W 72/877H10W 74/15H10W 72/874H10W 90/754H10W 72/07338H10W 72/07307H10W 70/093H10W 72/07207H10W 72/354H10W 90/00H10W 90/724H10W 90/732H10W 90/734H10W 90/731H10W 90/701H10W 74/019H10W 74/117H10W 70/685H10W 70/635H10W 70/614H10W 70/611H10W 72/0198H01L 24/96
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Claims

Abstract

An electronic package includes a flip-chip component having a first die coupled to a flip-chip substrate, second die stacked on the first die, an encapsulation compound formed around the first die and the second die, a set of through encapsulant vias (TEVs) providing a set of electrical connections from a first side of the electronic package to a second side of the electronic package through the encapsulation compound to the flip-chip substrate, and a redistribution layer electrically connecting a set of contacts on the second die to the set of TEVs on the first side of the electronic package.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for manufacturing an electronic package, the method comprising:
 providing a flip-chip component having a first die coupled to a flip-chip substrate;   adhering the first die to a second die;   forming an encapsulation compound around the first die and the second die;   drilling a set of through encapsulant vias (TEVs) from a first side of the electronic package to the flip-chip substrate located on a second side of the electronic package;   filling the set of TEVs with an electrically conductive material; and   applying a redistribution layer electrically connecting a set of contacts on the second die to the set of TEVs on the first side of the electronic package.   
     
     
         2 . The method of  claim 1  further comprising applying a protection layer covering the redistribution layer and the TEVs. 
     
     
         3 . The method of  claim 1  further comprising adhering solder balls to the flip-chip substrate. 
     
     
         4 . The method of  claim 1  further comprising separately testing and burning-in the flip-chip component. 
     
     
         5 . The method of  claim 1  further comprising:
 adhering the second die to a mold carrier with a releasable adhesive; and 
 removing the mold carrier from the second die. 
 
     
     
         6 . The method of  claim 1  further comprising:
 adhering the flip-chip component to a mold carrier with a releasable adhesive; and 
 removing the mold carrier from the flip-chip component. 
 
     
     
         7 . The method of  claim 6  further comprising coupling a set of posts onto the set of contacts on the second die. 
     
     
         8 . The method of  claim 5  wherein the posts comprise copper. 
     
     
         9 . The method of  claim 6  further comprising:
 forming the encapsulation compound over the second die; and 
 exposing the posts. 
 
     
     
         10 . The method of  claim 9  wherein exposing the posts comprises grinding the encapsulation compound until the posts are exposed, the encapsulation compound forming a substantially planer surface. 
     
     
         11 . The method of  claim 9  wherein exposing the posts comprises laser drilling the encapsulation compound.

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