Nonvolatile semiconductor memory device and method of manufacturing
Abstract
A nonvolatile semiconductor memory device includes a first insulating layer on a semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer. The charge storage layer includes a floating gate layer on the first insulating layer, an interface insulating layer on the floating gate layer, and a charge trap layer on the interface insulating layer, and a lower end of a conduction band of the interface insulating layer is higher than a trap level of the charge trap layer and is lower than a lower end of a conduction band of the charge trap layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of manufacturing a nonvolatile semiconductor memory device comprising a semiconductor layer, a first insulating layer on the semiconductor layer, a charge storage layer on the first insulating layer, a second insulating layer on the charge storage layer, and a control gate electrode on the second insulating layer, wherein the charge storage layer includes a floating gate layer on the first insulating layer, an interface insulating layer on the floating gate layer, and a charge trap layer on the interface insulating layer, wherein a lower end of a conduction band of the interface insulating layer is higher than a trap level of the charge trap layer and is lower than a lower end of a conduction band of the charge trap layer, and wherein the method comprises:
forming the interface insulating layer under a first condition which uses an atmosphere with first and second gases, as a first condition; and forming the charge trap layer under a second condition which uses an atmosphere with the first gas and without the second gas, wherein the interface insulating layer and the charge trap layer are continuously formed in an identical chamber by switching between the first and second conditions.
2 . The method of claim 1 , wherein the first gas includes Hf, and
the second gas includes an alkali metal.
3 . The method of claim 2 , wherein the alkali metal is Mg.
4 . The method of claim 1 , wherein the first gas includes Zr, and
the second gas includes an alkali metal.
5 . The method of claim 4 , wherein the alkali metal is Mg.
6 . The method of claim 1 , wherein the first gas includes Hf, and
the second gas includes a lanthanoid-based material.
7 . The method of claim 6 , wherein the lanthanoid-based material is one of La and Y.
8 . The method of claim 1 , wherein the first gas includes Zr, and
the second gas includes a lanthanoid-based material.
9 . The method of claim 8 , wherein the lanthanoid-based material is one of La and Y.
10 . The method of claim 1 , wherein the interface insulating layer and the charge trap layer are formed by a method of depositing the interface insulating layer and the charge trap layer in an unit of one atomic layer.Join the waitlist — get patent alerts
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