Recessed channel access transistor device and fabrication method thereof

Abstract

A recessed channel access transistor device is provided. A semiconductor substrate having thereon a trench is provided. The trench extends from a main surface of the semiconductor substrate to a predetermined depth. A buried gate electrode is disposed at a lower portion of the trench. A gate oxide layer is formed between the buried gate electrode and the semiconductor substrate. A drain doping region on a first side (cell side) of the trench in the semiconductor substrate and a source doping region on a second side (digit side) of the trench are formed. The source doping region has a junction depth that is deeper than that of the drain doping region. An L-shaped channel is defined along a sidewall surface on the first side and along a bottom surface of the trench between the drain doping region and the source doping region.

1 . A recessed channel access transistor device, comprising:
 a semiconductor substrate having thereon a trench extending from a main surface of the semiconductor substrate to a predetermined depth;   a buried gate electrode disposed at a lower portion of the trench;   a gate oxide layer between the buried gate electrode and the semiconductor substrate;   a drain doping region on a first side of the trench in the semiconductor substrate; and   a source doping region on a second side of the trench, wherein a top surface of the source doping region on the second side of the trench is lower than the main surface of the semiconductor substrate, and wherein the source doping region has a junction depth that is deeper than that of the drain doping region.   
     
     
         2 . The recessed channel access transistor device according to  claim 1  further comprising a dielectric layer in the trench, wherein the buried gate electrode is capped by the dielectric layer. 
     
     
         3 . The recessed channel access transistor device according to  claim 2  further comprising a recess on the second side of the trench, wherein a portion of the dielectric layer is revealed within the recess. 
     
     
         4 . The recessed channel access transistor device according to  claim 3  further comprising a contact element in the recess and in direct contact with the source doping region. 
     
     
         5 . The recessed channel access transistor device according to  claim 4  wherein the contact element is a doped polysilicon. 
     
     
         6 . The recessed channel access transistor device according to  claim 1  wherein the junction depth of the source doping region is substantially equal to the predetermined depth of the trench. 
     
     
         7 . The recessed channel access transistor device according to  claim 1  further comprising an L-shaped channel along a sidewall surface on the first side and along a bottom surface of the trench between the drain doping region and the source doping region. 
     
     
         8 - 10 . (canceled)