US2015132865A1PendingUtilityA1

Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus

Assignee: FUJITSU LTDPriority: Dec 27, 2002Filed: Jan 20, 2015Published: May 14, 2015
Est. expiryDec 27, 2022(expired)· nominal 20-yr term from priority
H10W 90/754H10W 72/07141H10W 72/0711H10W 72/011H10W 72/5363H10W 72/536H10W 74/15H10W 72/952H10W 72/9415H10W 72/923H10W 72/0198H10W 72/07331H10W 72/073H10W 72/07236H10W 72/352H10W 72/01331H10W 90/722H10W 72/252H10W 72/251H10W 72/012H10W 72/01251H10W 72/01225H10P 74/238H10P 74/207H10P 74/203H10W 90/724H10W 72/01235H10W 72/01208H10W 72/232H10W 72/016H10W 70/093H10P 54/00H01L 24/81H01L 2224/81075H01L 2224/11602H01L 2224/11632H01L 22/26H01L 21/78H01L 2224/1134H01L 2224/16225H01L 2224/11464H01L 2224/11019H01L 22/12H01L 2224/13155H01L 22/14H01L 24/11H01L 2224/13012
48
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor substrate is secured by suction to a rear face of a supporting face of a substrate supporting table. In this event, the thickness of the semiconductor substrate is made fixed by planarization on the rear face, and the rear face is forcibly brought into a state free from undulation by the suction to the supporting face, so that the rear face becomes a reference face for planarization of a front face. In this state, a tool is used to cut surface layers of Au projections and a resist mask on the front face, thereby planarizing the Au projections and the resist mask so that their surfaces become continuously flat. This can planarize the surfaces of fine bumps formed on the substrate at a low cost and a high speed in place of CMP.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A method for forming bumps on a front face of a substrate, wherein the bumps are for establishing an electrical connection with an external part, said method comprising the steps of:
 forming the plurality of bumps and an insulating film between the bumps on the front face of the substrate;   performing planarization by cutting using a tool so that surfaces of the bumps and a surface of the insulating film become continuously flat; and   removing the insulating film,   wherein the bumps are formed by a nickel-based electroless plating method, and   wherein in cutting the surfaces of the bumps, layers with a high concentration of phosphor created in surface layers of the bumps are removed.   
     
     
         3 . The method for forming bumps according to  claim 2 , wherein after the bumps are formed by the nickel-based electroless plating method, the insulating film is formed to cover the bumps. 
     
     
         4 . A method for forming on a front face of a semiconductor substrate stud bumps using a wire bonding method, the stud bumps being bumps for establishing an electrical connection with an external part, said method comprising the steps of:
 forming a plurality of projections using a bonding wire at electrical connecting points on the front face of the semiconductor substrate; and   performing planarization by cutting using a tool so that top surfaces of the plurality of projections become continuously flat to thereby form the stud bumps.   
     
     
         5 . The method for forming bumps according to  claim 4 , wherein the cutting is repeatedly performed until the intensity of laser light reaches a predetermined value for all of the projections, the intensity being detected by a method using a detecting apparatus comprising a laser emitter and a detector to sweep a laser beam across the top surface of the projection after the machining to detect laser light reflected off the top surface, by the detector. 
     
     
         6 . The method for forming bumps according to  claim 5 , wherein the detector is placed at a rear in a traveling direction of the tool and is moved in synchronism with an operation of the tool. 
     
     
         7 . The method for forming bumps according to  claim 4 , further comprising the steps of:
 forming a protective film to cover the plurality of projections; and   performing planarization by the cutting so that top surfaces of the plurality of projections and a surface of the protective film become continuously flat, and then removing the protective film.   
     
     
         8 . A method for manufacturing a semiconductor device, comprising the steps of:
 forming a plurality of bumps on a front face of a semiconductor substrate;   performing planarization by cutting using a tool so that surfaces of the plurality of bumps become continuously flat;   cutting out each semiconductor chip from the semiconductor substrate having the plurality of bumps with the planarized surfaces; and   connecting the bump of the semiconductor chip with one end portion of a lead terminal.   
     
     
         9 . The method for manufacturing a semiconductor device according to  claim 8 , further comprising the step of:
 performing planarization by machining on a rear face with reference to the front face of the semiconductor substrate,   wherein the planarization of the surfaces of the bumps is performed by the cutting with reference to the rear face.   
     
     
         10 . A method for manufacturing a semiconductor device, comprising the steps of:
 forming a plurality of projections using a wire bonding method at electrical connecting points on a front face of a semiconductor substrate;   performing planarization by cutting using a tool so that top surfaces of the plurality of projections become continuously flat to thereby form stud bumps;   cutting out each semiconductor chip from the semiconductor substrate having the plurality of stud bumps formed thereon; and   connecting the stud bump on the semiconductor chip with one end portion of a lead terminal.   
     
     
         11 . The method for manufacturing a semiconductor device according to  claim 10 , further comprising the step of:
 performing planarization by machining on a rear face with reference to the front face of the semiconductor substrate,   wherein the planarization of the surfaces of the bumps is performed by the cutting with reference to the rear face.   
     
     
         12 . The method for manufacturing a semiconductor device according to  claim 10 , further comprising the step of:
 performing inspection by bringing a probe into contact with the surface of the bump, after the surface of the bump is planarized and before the bump is connected with the lead terminal.   
     
     
         13 . A method for manufacturing a semiconductor device, comprising the steps of:
 introducing a semiconductor chip having a plurality of electrodes formed on a front face thereof into an inert atmosphere and performing planarization by cutting using a tool so that surfaces of the plurality of electrodes become continuously flat; and   integrally connecting the plurality of electrodes on the semiconductor chip and a circuit board in a state in which the planarized surfaces of the plurality of electrodes are kept clean in the inert atmosphere.   
     
     
         14 . The method for manufacturing a semiconductor device according to  claim 13 ,
 wherein a plurality of electrodes formed on a front face of the circuit board have been subjected to planarization by cutting using a tool so that the surfaces thereof become continuously flat, and   wherein the semiconductor chip and the circuit board are integrated, with the surfaces of the respective electrodes connected opposing each other.

Join the waitlist — get patent alerts

Track US2015132865A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.