US2015162212A1PendingUtilityA1

Method for Fabricating CMOS Compatible Contact Layers in Semiconductor Devices

Assignee: IMEC VZWPriority: Dec 5, 2013Filed: Nov 24, 2014Published: Jun 11, 2015
Est. expiryDec 5, 2033(~7.4 yrs left)· nominal 20-yr term from priority
H10P 95/904H10P 50/667H10P 14/412H10D 62/854H10D 84/05H10D 64/62H10D 62/8503H10D 62/85H10H 20/825H10H 20/032H10H 20/8252H10H 20/832H01L 21/32051H01L 21/32134
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Claims

Abstract

A method for fabricating Complementary Metal Oxide Semiconductor (CMOS) compatible contact layers in semiconductor devices is disclosed. In one embodiment, a nickel (Ni) layer is deposited on a p-type gallium nitride (GaN) layer of a GaN based structure. Further, the GaN based structure is thermally treated at a temperature range of 350° C. to 500° C. Furthermore, the Ni layer is removed using an etchant. Additionally, a CMOS compatible contact layer is deposited on the p-type GaN layer, upon removal of the Ni layer.

Claims

exact text as granted — not AI-modified
1 . A method for fabricating a complementary metal oxide semiconductor (CMOS) compatible contact layer on a p-type gallium nitride (GaN) layer of a GaN based structure, the method comprising:
 depositing a nickel (Ni) layer on the p-type GaN layer;   thermally treating the GaN based structure at a temperature range of 350° C. to 500° C., upon depositing the Ni layer;   removing the Ni layer using an etchant, upon thermally treating the GaN based structure; and   depositing the CMOS compatible contact layer on the p-type GaN layer, upon removing the Ni layer.   
     
     
         2 . The method of  claim 1 , wherein the p-type GaN layer comprises magnesium (Mg) dopants. 
     
     
         3 . The method of  claim 1 , further comprising:
 annealing the GaN based structure at about 750° C. in a nitrogen atmosphere, prior to depositing the Ni.   
     
     
         4 . The method of  claim 1 , wherein thermally treating the GaN based structure further comprises: thermally treating the GaN based structure in an oxygen atmosphere for about 60 seconds. 
     
     
         5 . The method of  claim 1 , wherein the Ni layer comprises thickness of 5 nm to 15 nm. 
     
     
         6 . The method of  claim 1 , wherein the etchant comprises a solution of sulfuric acid (H 2 SO 4 ) and hydrogen peroxide (H 2 O 2 ). 
     
     
         7 . The method of  claim 1 , wherein the CMOS compatible contact layer comprises a multi layer structure of titanium aluminum titanium (TiAlTi).

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