Silicon waveguides with embedded active circuitry

Abstract

The present disclosure discloses silicon waveguides with embedded active circuitry fabricated from silicon wafers utilizing photolithographic microfabrication techniques to define waveguide structures and embedded circuit recesses for receiving integrated circuitry. The method of fabricating the waveguides utilizes a double masking layer, one layer of which at least partially defines at least one waveguide and the other layer of which at least partially defines the at least one waveguide and at least one embedded circuit recess. The photolithographic microfabrication techniques are sufficiently precise for the required small structural features of high frequency waveguides and the double masking layer allows the method to be completed more efficiently. The basic fabrication method may be extended to provide batch arrays to mass produce silicon waveguide devices.

We claim:  
     
         1 . A waveguide apparatus, comprising:
 a first silicon structure, said first silicon structure defining a first portion of a waveguide and a recessed area to receive a circuit;   a circuit embedded within said recessed area; and   a second silicon structure, said second silicon structure defining a second portion of said waveguide, said first and second silicon structures bonded together such that the first and second portions of said waveguide are aligned.   
     
     
         2 . The waveguide apparatus of  claim 1 , further comprising at least one chip-probe access port, said at least one chip-probe access port allowing outside access to said embedded circuit. 
     
     
         3 . The waveguide apparatus of  claim 2 , wherein said embedded circuit is at least partially on said at least one chip-probe access port. 
     
     
         4 . The waveguide apparatus of  claim 2 , wherein said embedded circuit is at least partially under said at least one chip-probe access port. 
     
     
         5 . The waveguide apparatus of  claim 1 , further comprising providing at least one input/output line which is routed to said circuit. 
     
     
         6 . The waveguide apparatus of  claim 5 , wherein said at least one input/output line is routed to said circuit across the lower portion of said recessed area. 
     
     
         7 . The waveguide apparatus of  claim 1 , wherein said waveguide comprises a surface comprising a conductive material. 
     
     
         8 . The waveguide apparatus of  claim 7 , wherein said conductive material is gold. 
     
     
         9 . The waveguide apparatus of  claim 1 , wherein said embedded circuit comprises an e-plane probe configured to communicate with said waveguide. 
     
     
         10 . The waveguide apparatus of  claim 1 , wherein said recessed area comprises physical characteristics consistent with etching. 
     
     
         11 . The waveguide apparatus of  claim 10 , wherein said recessed area comprises physical characteristics consistent with reactive ion etching. 
     
     
         12 . The waveguide apparatus of  claim 1 , wherein a plurality of said waveguide structures are fabricated on a common substrate to form an array. 
     
     
         13 . A waveguide apparatus, comprising:
 a first silicon structure comprising a first surface;   a second silicon structure comprising a second surface, said first silicon structure and said second silicon structure coupled together such that said first surface is adjacent to said second surface;   a first recess extending from said first surface into said first silicon structure;   a second recess extending from said second surface into said second silicon structure, such that said first recess and said second recess form at least one waveguide; and   a circuit embedded within said at least one waveguide.   
     
     
         14 . The waveguide apparatus of  claim 13 , wherein said first and second silicon structures comprise a silicon-on-insulator (SOI) wafer. 
     
     
         15 . The waveguide apparatus of  claim 13 , further comprising at least one embedded circuit recess. 
     
     
         16 . The waveguide apparatus of  claim 15 , wherein said embedded circuit recess is adjacent to said first recess. 
     
     
         17 . The waveguide apparatus of  claim 15 , wherein said circuit is embedded in said at least one embedded circuit recess. 
     
     
         18 . The waveguide apparatus of  claim 13 , wherein said first and second recesses comprises physical characteristics consistent with etching. 
     
     
         19 . The waveguide apparatus of  claim 18 , wherein said first and second recesses comprises physical characteristics consistent with reactive ion etching. 
     
     
         20 . The waveguide apparatus of  claim 13 , wherein said at least one waveguide comprises a conductive surface. 
     
     
         21 . The waveguide apparatus of  claim 13 , wherein said embedded circuit comprises an e-plane probe configured to communicate with said at least one waveguide. 
     
     
         22 . A waveguide apparatus, comprising:
 a plurality of waveguide structures formed on a common substrate, each of said waveguide structures comprising:
 a first silicon structure, said first silicon structure defining a first portion of a waveguide and a recessed area configured to receive a circuit; 
 a circuit embedded within said recessed area; and 
   a second silicon structure, said second silicon structure defining a second portion of said waveguide, said first and second silicon structures bonded together such that the first and second portions of said waveguide are aligned.