Semiconductor device

Abstract

Provided are a semiconductor device and a fabricating method of the semiconductor device. The semiconductor device may include an interlayer dielectric film formed on a substrate and including a trench, a gate insulating film formed in the trench, a first work function control film formed on the gate insulating film of the trench along bottom and sidewalls of the trench, a first metal gate pattern formed on the first work function control film of the trench and filling a portion of the trench, and a second metal gate pattern formed on the first metal gate pattern of the trench, the second metal gate pattern different from the first metal gate pattern.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate;   a first interlayer dielectric film disposed in a first region of the substrate and including a first trench;   a second interlayer dielectric film disposed in a second region of the substrate and including a second trench;   a first gate insulating film formed along sidewalls and a bottom surface of the first trench;   a second gate insulating film formed along sidewalls and a bottom surface of the second trench;   at least one first work function control layer disposed in the first trench and on the first gate insulating film;   at least one second work function control layer disposed in the second trench and on the second gate insulating film;   a first adhesive film disposed in the first trench and on the at least one first work function control layer;   a second adhesive film disposed in the second trench and on the at least one second work function control layer;   a first metal gate pattern and a second metal gate pattern filling the first trench, the second metal gate pattern being disposed on the first metal gate pattern, the first metal gate pattern being disposed on the first adhesive film; and   a third metal gate pattern and a fourth metal gate pattern filling the second trench, the fourth metal gate pattern being disposed on the third metal gate pattern, the third metal gate pattern being disposed on the second adhesive film,   wherein a shortest distance between a surface of the second metal gate pattern and the first adhesive film is less than a shortest distance between a surface of the fourth metal gate pattern and the second adhesive film.   
     
     
         2 . The semiconductor device of  claim 1 , wherein an N type transistor is formed in the first region of the substrate, and a P type transistor is formed in the second region of the substrate. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the at least one second work function control layer includes a P type work function control film and an N type work function control film formed on the P type work function control film. 
     
     
         4 . The semiconductor device of  claim 3 , wherein the P type work function control film and the second adhesive film are made of the same material. 
     
     
         5 . The semiconductor device of  claim 3 , wherein the P type work function control film and the second adhesive film are made of titanium nitride (TiN). 
     
     
         6 . The semiconductor device of  claim 1 , wherein the at least one first work function control layer includes an N type work function control film. 
     
     
         7 . The semiconductor device of  claim 6 , wherein the N type work function control film is made of TiAlC. 
     
     
         8 . The semiconductor device of  claim 1 , wherein each of the first gate insulating film and the second gate insulting film includes a high-k dielectric material. 
     
     
         9 . The semiconductor device of  claim 1 , wherein the first metal gate pattern includes Al, and the second metal gate pattern includes W. 
     
     
         10 . The semiconductor device of  claim 1 , wherein each of the at least one first work function control layer and the first adhesive film includes a chamfered surface, and
 each of the at least one second work function control layer and the second adhesive film includes a chamfered surface.   
     
     
         11 . The semiconductor device of  claim 1 , wherein a width of the first metal gate pattern is greater than a width of the third metal gate pattern 
     
     
         12 . A semiconductor device comprising:
 a substrate;   a first interlayer dielectric film disposed in a first region of the substrate and including a first trench;   a second interlayer dielectric film disposed in a second region of the substrate and including a second trench;   a first gate insulating film formed along sidewalls and a bottom surface of the first trench;   a second gate insulating film formed along sidewalls and a bottom surface of the second trench;   at least one first work function control layer disposed in the first trench and on the first gate insulating film;   at least one second work function control layer disposed in the second trench and on the second gate insulating film;   a first adhesive film disposed in the first trench and on the at least one first work function control layer;   a second adhesive film disposed in the second trench and on the at least one second work function control layer;   a first metal gate pattern disposed on the first adhesive film and filling the first trench; and   a second metal gate pattern disposed on the second adhesive film and filling the second trench,   wherein a width of a bottom portion of the first metal gate pattern is greater than a width of a bottom portion of the second metal gate pattern.   
     
     
         13 . The semiconductor device of  claim 12 , wherein a shortest distance between a surface of the first metal gate pattern and the first adhesive film is less than a shortest distance between a surface of the second metal gate pattern and the second adhesive film. 
     
     
         14 . The semiconductor device of  claim 12 , wherein the first metal gate pattern includes a first layer and a second layer. 
     
     
         15 . The semiconductor device of  claim 12 , wherein an N type transistor is formed in the first region of the substrate, and a P type transistor is formed in the second region of the substrate. 
     
     
         16 . The semiconductor device of  claim 12 , wherein the semiconductor device is a fin type transistor. 
     
     
         17 . A semiconductor device comprising:
 a substrate including a fin;   a gate electrode formed on the fin; and   an elevated source/drain disposed at two sides of the gate electrode,   wherein the gate electrode includes:
 a first interlayer dielectric film disposed in a first region of the substrate and including a first trench; 
 a second interlayer dielectric film disposed in a second region of the substrate and including a second trench; 
 a first gate insulating film formed along sidewalls and a bottom surface of the first trench; 
 a second gate insulating film formed along sidewalls and a bottom surface of the second trench; 
 a first adhesive film disposed in the first trench; and 
 a second adhesive film disposed in the second trench, 
   wherein a shortest distance between the fin and the first adhesive film is less than a shortest distance between the fin and the second adhesive film.   
     
     
         18 . The semiconductor device of  claim 17 , wherein the gate electrode includes at least one first work function control layer disposed in the first trench and on the first gate insulating film and at least one second work function control layer disposed in the second trench and on the second gate insulating film. 
     
     
         19 . The semiconductor device of  claim 17 , further comprising a spacer for insulating the elevated source/drain from the gate electrode. 
     
     
         20 . The semiconductor device of  claim 17 , further comprising a first metal gate pattern that is disposed on the first adhesive film and fills the first trench, and a second metal gate pattern that is disposed on the second adhesive film and fills the second trench.