Nanowire device with alumina passivation layer and methods of making same

Abstract

In one aspect, the present disclosure relates to a device including a silicon substrate, wherein at least a portion of the substrate surface can be a silicon nanowire array; and a layer of alumina covering the silicon nanowire array. In some embodiments, the device can be a solar cell. In some embodiments, the device can be a p-n junction. In some embodiments, the p-n junction can be located below the bottom surface the nanowire array.

What is claimed is:  
     
         1 . A process of manufacturing a device comprising a nanowire array, comprising the steps of:
 forming a nanowire array of p-type silicon nanowires on an n-type silicon substrate;   forming a p-n junction in the substrate below a bottom surface of the nanowire array; and   passivating the device by depositing a layer of alumina on the nanowire array.   
     
     
         2 . The process of  claim 1 , wherein the alumina is deposited by atomic layer deposition. 
     
     
         3 . The device of  claim 1 , wherein the device is a photovoltaic cell. 
     
     
         4 . A device comprising:
 a silicon substrate, wherein at least a portion of the substrate surface comprises a silicon nanowire array of p-type silicon nanowires; and   a layer of alumina covering and passivating the silicon nanowire array.   
     
     
         5 . The device of  claim 4 , wherein the device comprises a solar cell. 
     
     
         6 . The device of  claim 4 , wherein the device comprises a p-n junction. 
     
     
         7 . The device of  claim 6 , wherein the p-n junction is located below the bottom surface the nanowire array. 
     
     
         8 . A device comprising:
 a silicon substrate, wherein at least a portion of the substrate surface comprises a black silicon with a surface including p-type silicon nanostructuring; and   a layer of alumina covering and passivating the black silicon.   
     
     
         9 . The device of  claim 8 , wherein the device comprises a solar cell. 
     
     
         10 . The device of  claim 8 , wherein the device comprises a p-n junction. 
     
     
         11 . The device of  claim 10 , wherein the p-n junction is located below the bottom surface the nanowire array. 
     
     
         12 . The device of  claim 8 , wherein the black silicon comprises an array of nanowires. 
     
     
         13 . The device of  claim 8 , wherein the black silicon comprises porous silicon. 
     
     
         14 . The device of  claim 8 , wherein the black silicon comprises silicon having a graded index of refraction. 
     
     
         15 . The device of  claim 8 , wherein the black silicon comprises silicon having a needle-shaped surface structure. 
     
     
         16 . The process of  claim 1 , wherein the step of passivating is the only step in the process used to passivate the nanowire array.