Robust and High Performance Instructions for System Call

Abstract

Robust system call and system return instructions are executed by a processor to transfer control between a requester and an operating system kernel. The processor includes execution circuitry and registers that store pointers to data structures in memory. The execution circuitry receives a system call instruction from a requester to transfer control from a first privilege level of the requester to a second privilege level of an operating system kernel. In response, the execution circuitry swaps the data structures that are pointed to by the registers between the requester and the operating system kernel in one atomic transition.

What is claimed is: 
     
         1 . An apparatus comprising:
 decoder circuitry to decode an instruction;   execution circuitry to execute the decoded instruction to restore control from an operating system kernel to a requester in one atomic transition.   
     
     
         2 . The apparatus of  claim 1 , wherein the operating system to provide the instruction. 
     
     
         3 . The apparatus of  claim 1 , wherein the execution circuitry to determine that the instruction call is valid prior to restoring control. 
     
     
         4 . The apparatus of  claim 1 , wherein the execution circuitry to verify address conformity. 
     
     
         5 . The apparatus of  claim 4 , wherein the execution circuitry to verify that at least one segment register is loaded with valid addresses. 
     
     
         6 . The apparatus of  claim 1 , wherein the execution circuitry to restore control when a privilege level of the requester is non-zero. 
     
     
         7 . A method comprising:
 decode an instruction with decoder circuitry;   executing the decoded instruction to restore control from an operating system kernel to a requester in one atomic transition.   
     
     
         8 . The method of  claim 7 , further comprising:
 receiving the instruction from the operating system.   
     
     
         9 . The method of  claim 7 , further comprising:
 determining that the instruction call is valid prior to restoring control.   
     
     
         10 . The method of  claim 7 , further comprising:
 verifying address conformity.   
     
     
         11 . The method of  claim 10 , wherein verifying address conformity is performed by verifying that at least one segment register is loaded with valid addresses. 
     
     
         12 . The method of  claim 7 , further comprising:
 restoring control when a privilege level of the requester is non-zero.