Above motherboard interposer with quarter wavelength electrical paths

Abstract

An apparatus includes a processor having an array of processor interconnects arranged to connect the processor to conductive paths, a circuit substrate having an array of circuit interconnects arranged to provide connections between the processor and the circuit substrate, the circuit substrate having conductive paths connected to the array of circuit interconnects, an interposer substrate arranged between the processor and the circuit substrate, at least one conductive trace in the interposer substrate in connection with at least one processor interconnect in the array of interconnects on the processor, the conductive trace arranged at least partially parallel to the interposer substrate such that no electrical connection exists between the conductive trace in the interposer substrate and a corresponding one of the circuit interconnects on the circuit substrate, and at least one peripheral circuit connected to the at least one conductive trace

What is claimed is: 
     
         1 . An apparatus comprising:
 a processor having an array of processor interconnects arranged to connect the processor to conductive paths;   a circuit substrate having an array of circuit interconnects arranged to provide connections between the processor and the circuit substrate, the circuit substrate having conductive paths connected to the array of circuit interconnects;   an interposer substrate arranged between the processor and the circuit substrate, at least one conductive trace in the interposer substrate in connection with at least one processor interconnect in the array of interconnects on the processor, the conductive trace arranged at least partially parallel to the interposer substrate such that no electrical connection exists between the conductive trace in the interposer substrate and a corresponding one of the circuit interconnects on the circuit substrate; and   at least one peripheral circuit connected to the at least one conductive trace, wherein signals travel through the trace between the processor and the peripheral circuit in 100 picoseconds or less.   
     
     
         2 . The apparatus of  claim 1 , further comprising a main memory electrically connected to at least one of the conductive paths in the circuit substrate. 
     
     
         3 . The apparatus of  claim 2 , wherein the peripheral circuit comprises an off-chip cache. 
     
     
         4 . The apparatus of  claim 3 , wherein the peripheral circuit comprising the off-chip cache of memory having a storage capacity with a range of 64 to 128 Gigabytes. 
     
     
         5 . The apparatus of  claim 2 , wherein the main memory has a storage capacity with a range of 64 to 128 Gigabytes. 
     
     
         6 . The apparatus of  claim 1 , wherein the peripheral circuit comprises a solid state disk drive. 
     
     
         7 . The apparatus of  claim 1 , wherein the peripheral circuit comprises a graphics processor. 
     
     
         8 . The apparatus of  claim 1 , wherein the processor comprises a graphics processor. 
     
     
         9 . The apparatus of  claim 1 , wherein the peripheral circuit comprises a connector. 
     
     
         8 . An apparatus comprising:
 a processor having an array of processor interconnects arranged to connect the processor to conductive paths;   a circuit substrate having an array of circuit interconnects arranged to provide connections between the processor and the circuit substrate, the circuit substrate having conductive paths connected to the array of circuit interconnects;   an interposer substrate arranged between the processor and the circuit substrate, at least one conductive trace in the interposer substrate in connection with at least one processor interconnect in the array of interconnects on the processor, the conductive trace arranged at least partially parallel to the interposer substrate such that no electrical connection exists between the conductive trace in the interposer substrate and a corresponding one of the circuit interconnects on the circuit substrate; and   at least one peripheral circuit connected to the at least one conductive trace, wherein signals travel through the trace between the processor and the peripheral circuit in one-eighth the time signals would travel between the processor and a device on the circuit substrate.   
     
     
         9 . The apparatus of  claim 8 , wherein the peripheral circuit comprises a graphics processor. 
     
     
         10 . The apparatus of  claim 8 , wherein the processor comprises a graphics processor. 
     
     
         11 . The apparatus of  claim 8 , wherein the peripheral circuit comprises a connector. 
     
     
         12 . An apparatus comprising:
 a processor having an array of processor interconnects arranged to connect the processor to conductive paths;   a circuit substrate having an array of circuit interconnects arranged to provide connections between the processor and the circuit substrate, the circuit substrate having conductive paths connected to the array of circuit interconnects;   an interposer substrate arranged between the processor and the circuit substrate, at least one conductive trace in the interposer substrate in connection with at least one processor interconnect in the array of interconnects on the processor, the conductive trace arranged at least partially parallel to the interposer substrate such that no electrical connection exists between the conductive trace in the interposer substrate and a corresponding one of the circuit interconnects on the circuit substrate;   a main memory electrically connected to at least one of the conductive paths in the circuit substrate;   a peripheral circuit electrically connected to the main memory through at least one conductive trace in the interposer substrate, the peripheral circuit comprising at least a portion of an off-chip cache.   
     
     
         13 . The apparatus of  claim 12 , wherein the peripheral circuit comprises a graphics processor. 
     
     
         14 . The apparatus of  claim 12 , wherein the processor comprises a graphics processor. 
     
     
         15 . The apparatus of  claim 12 , wherein the peripheral circuit comprises a connector.