Nonvolatile semiconductor memory device and method of controlling the same

Abstract

According to an embodiment, a nonvolatile semiconductor memory device comprises: a memory cell array; and a control circuit that manages a setting operation and a read operation. The memory cell array comprises: a first wiring line; a second wiring line intersecting the first wiring line; and a memory cell including a variable resistance element and a nonlinear element. The variable resistance element is configured having a first metal film, a first variable resistance film, a second variable resistance film, and a second metal film stacked and disposed therein in this order. A work function of the second metal film is smaller than a work function of the first metal film.

What is claimed is: 
     
         1 . A nonvolatile semiconductor memory device, comprising:
 a memory cell array; and   a control circuit that applies a voltage to the memory cell array to manage a setting operation and a read operation,   the memory cell array comprising: a first wiring line; a second wiring line intersecting the first wiring line; and a memory cell disposed at an intersection of the first and second wiring lines and including a variable resistance element and a nonlinear element,   the variable resistance element being configured having a first metal film, a first variable resistance film, a second variable resistance film, and a second metal film stacked and disposed therein in this order, and   a work function of the second metal film being smaller than a work function of the first metal film.   
     
     
         2 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 the second variable resistance film is of lower permittivity than the first variable resistance film.   
     
     
         3 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 a thickness of the second variable resistance film is 3 nm or less.   
     
     
         4 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 the first metal film includes any of Ti, Pt, Ru, or Ir.   
     
     
         5 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 the second metal film includes W or Ta, or a nitride of these.   
     
     
         6 . The nonvolatile semiconductor memory device according to  claim 1 , wherein
 electrons are injected from a first metal film side to a second metal film side during the setting operation, and   electrons are injected from the second metal film side to the first metal film side during the read operation.   
     
     
         7 . A method of controlling a nonvolatile semiconductor memory device, the nonvolatile semiconductor memory device comprising:
 a memory cell array; and   a control circuit that applies a voltage to the memory cell array to manage a setting operation and a read operation,   the memory cell array comprising: a first wiring line; a second wiring line intersecting the first wiring line; and a memory cell disposed at an intersection of the first and second wiring lines and including a variable resistance element and a nonlinear element,   the variable resistance element being having a first metal film, a first variable resistance film, a second variable resistance film, and a second metal film stacked and disposed therein in this order, and   a work function of the second metal film being smaller than a work function of the first metal film,   the method comprising:   during the setting operation, injecting electrons from a first metal film side to a second metal film side; and   during the read operation, injecting electrons from the second metal film side to the first metal film side,   with respect to the nonvolatile semiconductor memory device.   
     
     
         8 . The method of controlling a nonvolatile semiconductor memory device according to  claim 7 , wherein
 the second variable resistance film is of lower permittivity than the first variable resistance film.   
     
     
         9 . The method of controlling a nonvolatile semiconductor memory device according to  claim 7 , wherein
 a thickness of the second variable resistance film is 3 nm or less.   
     
     
         10 . The method of controlling a nonvolatile semiconductor memory device according to  claim 7 , wherein
 the first metal film includes any of Ti, Pt, Ru, or Ir.   
     
     
         11 . The method of controlling a nonvolatile semiconductor memory device according to  claim 7 , wherein
 the second metal film includes W or Ta, or a nitride of these.   
     
     
         12 . A nonvolatile semiconductor memory device, comprising:
 a memory cell array including a plurality of memory cells; and   a control circuit that applies a voltage to the memory cell array to manage a setting operation and a read operation,   the memory cell array comprising: a plurality of first conductive layers stacked with a certain pitch in a first direction perpendicular to a substrate and extending in a second direction parallel to the substrate; a memory layer provided commonly to side surfaces of the plurality of first conductive layers and functioning as the memory cell; a second conductive layer electrically connected to the plurality of first conductive layers via the memory layer and extending in the first direction; and a nonlinear element electrically connected to the second conductive layer,   the variable resistance element being configured having a first variable resistance film and a second variable resistance film stacked and disposed therein, and   a work function of the second conductive layer being smaller than a work function of the first conductive layer.   
     
     
         13 . The nonvolatile semiconductor memory device according to  claim 12 , wherein
 the second variable resistance film is of lower permittivity than the first variable resistance film.   
     
     
         14 . The nonvolatile semiconductor memory device according to  claim 12 , wherein
 a thickness of the second variable resistance film is 3 nm or less.   
     
     
         15 . The nonvolatile semiconductor memory device according to  claim 12 , wherein
 the first conductive layer includes any of Ti, Pt, Ru, or Ir.   
     
     
         16 . The nonvolatile semiconductor memory device according to  claim 12 , wherein
 the second conductive layer includes W or Ta, or a nitride of these.   
     
     
         17 . The nonvolatile semiconductor memory device according to  claim 12 , wherein
 electrons are injected from a first metal film side to a second metal film side during the setting operation, and   electrons are injected from the second metal film side to the first metal film side during the read operation.