US2017154851A1PendingUtilityA1

Method of forming a damascene interconnect on a barrier layer

Assignee: MONTEREY RES LLCPriority: Jun 30, 2005Filed: Feb 13, 2017Published: Jun 1, 2017
Est. expiryJun 30, 2025(expired)· nominal 20-yr term from priority
Inventors:Takayuki Enda
H10P 50/264H10W 20/089H10W 20/081H10W 20/074H10W 20/063H10W 20/056H10W 20/035H10W 20/034H10W 20/039H10W 20/425H01L 21/76885H01L 23/53238H01L 21/76846H01L 21/76802H01L 21/32133H01L 21/76877
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Claims

Abstract

A semiconductor device includes a first metal layer provided above a semiconductor substrate, an interlayer insulating film provided above the first metal layer, a second metal layer that is provided in an opening formed in the interlayer insulating film and is in contact with an underlying layer, the second metal layer being connected to the first metal layer, and a first barrier layer that is provided between the second metal layer and the interlayer insulating film and has a different main composition from that of the underlying layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of fabricating a semiconductor device comprising:
 forming a conductive film above a first metal layer formed above a semiconductor substrate, the conductive film serving as a first barrier layer;   forming an opening in the conductive film by etching the conductive film;   forming a second metal layer in the opening; and   forming the first barrier layer by etching the conductive film except a region around the second metal layer.

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