US2017170592A1PendingUtilityA1

Batch fabricated microconnectors

51
Assignee: NUVOTRONICS INCPriority: Jun 6, 2011Filed: Jan 12, 2017Published: Jun 15, 2017
Est. expiryJun 6, 2031(~4.9 yrs left)· nominal 20-yr term from priority
H10W 90/701H01R 13/514H01R 13/111H01R 24/50H01R 43/16H01R 13/40H05K 2201/10189Y10T29/49165H05K 3/366H01R 4/34
51
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Claims

Abstract

Connectors and interconnects for high power connectors which may operate at frequencies up to approximately 110 GHz and fabrication methods thereof are provided.

Claims

exact text as granted — not AI-modified
1 - 27 . (canceled) 
     
     
         28 . A multilayer microconnector structure, comprising:
 a substrate having opposing first and second surfaces;   a plurality of microconnectors disposed in an array of a selected pitch at the first substrate surface, each microconnector comprising a plurality of stacked layers of a conductor material extending upwardly from the first substrate surface; and   a dilation having opposing first and second dilation surfaces, the first dilation surface having a first array of electrical contacts disposed thereat having a pitch equal to that of the selected pitch, each electrical contact disposed in electrical communication with a respective microconnector of the plurality of microconnectors, and the dilation having a second array of electrical contacts disposed at the second dilation surface, the second array having a second pitch different from the selected pitch, the dilation comprising transmission lines extending within the dilation, each line extending from a respective contact of the first dilation surface to a respective contact of the second dilation surface.   
     
     
         29 . The multilayer microconnector structure according to  claim 28 , wherein at least one of the first and second substrate surfaces includes one or more of an active electronic component and a passive electronic component. 
     
     
         30 . The multilayer microconnector structure according to  claim 29 , wherein the passive electronic component includes one or more of a thin-film, thick-film, or surface mount resistor. 
     
     
         31 . The multilayer microconnector structure according to  claim 28 , wherein each microconnector includes a center conductor and an outer conductor, and wherein at least one of an active electronic component and a passive electronic component is electrically connected between the center and outer conductors. 
     
     
         32 . The multilayer microconnector structure according to  claim 28 , comprising one or more of an active electronic component and a passive electronic component operably connected within each of the plurality of microconnectors. 
     
     
         33 . The multilayer microconnector structure according to  claim 28 , wherein the substrate is an active device. 
     
     
         34 . The multilayer microconnector structure according to  claim 28 , wherein the substrate includes a circuit board. 
     
     
         35 . The multilayer microconnector structure according to  claim 28 , wherein the substrate includes a MMIC. 
     
     
         36 . The multilayer microconnector structure according to  claim 28 , wherein each microconnector includes a hollow waveguide. 
     
     
         37 . The multilayer microconnector structure according to  claim 28 , wherein each microconnector is a hollow waveguide. 
     
     
         38 . The multilayer microconnector structure according to  claim 28 , wherein the dilation transmission lines include coaxial transmission lines. 
     
     
         39 . A method for forming a multilayer microconnector structure by a sequential build process, comprising:
 depositing a plurality of layers on a first substrate, wherein the layers comprise one or more of a first conductor material and a first sacrificial material; and   removing the first sacrificial material, thereby forming a multilayer microconnector structure comprising a plurality of microconnectors disposed in an array of a selected pitch at the first substrate surface, each microconnector comprising a plurality of stacked layers of the first conductor material extending upwardly from the first substrate surface.   
     
     
         40 . The method according to  claim 39 , comprising:
 depositing a plurality of second layers on a second substrate, wherein the second layers comprise one or more of a second conductor material and a second sacrificial material; and   removing the second sacrificial material, thereby forming a dilation having opposing first and second dilation surfaces, the first dilation surface having a first array of electrical contacts disposed thereat having a pitch equal to that of the selected pitch, and the dilation having a second array of electrical contacts disposed at the second dilation surface, the second array having a second pitch different from the selected pitch, the dilation comprising transmission lines formed of the second conductor material, each line extending from a respective contact of the first dilation surface to a respective contact of the second dilation surface.   
     
     
         41 . The method of  claim 40 , wherein the dilation transmission lines include coaxial transmission lines. 
     
     
         42 . The method of  claim 39 , wherein the first and second conductor materials are metal. 
     
     
         43 . The method of  claim 39 , wherein the substrate is an active device. 
     
     
         44 . The method of  claim 39 , wherein the substrate includes a circuit board. 
     
     
         45 . The method of  claim 39 , wherein the substrate includes a MMIC. 
     
     
         46 . The method of  claim 39 , wherein each microconnector includes a hollow waveguide. 
     
     
         47 . The method of  claim 39 , wherein each microconnector is a hollow waveguide. 
     
     
         48 . A method for forming a multilayer microconnector structure by a sequential build process, comprising:
 depositing a plurality of layers on a substrate, wherein the layers comprise one or more of a conductor material and a sacrificial material; and   removing the sacrificial material, thereby forming a dilation having opposing first and second dilation surfaces, the first dilation surface having a first array of electrical contacts disposed thereat having a first pitch and having a second array of electrical contacts disposed at the second dilation surface, the second array having a second pitch different from the first pitch, the dilation comprising transmission lines formed of the conductor material, each line extending from a respective contact of the first dilation surface to a respective contact of the second dilation surface.   
     
     
         49 . The method of  claim 48 , wherein the dilation transmission lines include coaxial transmission lines. 
     
     
         50 . The method of  claim 48 , wherein the conductor material is metal. 
     
     
         51 . The method of  claim 48 , comprising removing the dilation from the substrate.

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