Non-volatile memory device having reduced drain and read disturbances

Abstract

A source-drain structure is disclosed. The source-drain structure includes a substrate containing a drain region and a source region. The drain region includes a lightly-doped ultra-shallow junction and a heavily-doped region, and a drain-substrate junction disposed in the vicinity of a junction between a side portion and a bottom portion of the lightly-doped ultra-shallow junction and the substrate, a plurality of impurity ions in the drain-substrate junction and a plurality of impurity ions in the lightly-doped ultra-shallow junction are opposite-conductivity type ions. The drain-substrate junction can smooth out the steep surface of the lightly-doped ultra-shallow junction to minimize the maximum electric field and reduce the ion flow close to the channel, and effectively reduce the inter-band tunneling hot electron effect.

What is claimed is: 
     
         1 . A source-drain structure, comprising:
 a substrate comprising a drain region and a source region, the drain region comprising:   a lightly-doped ultra-shallow junction and a heavily-doped region; and   a drain-substrate junction disposed in the vicinity of a junction between a side portion and a bottom portion of the lightly-doped ultra-shallow junction and the substrate, a plurality of impurity ions in the drain-substrate junction and a plurality of impurity ions in the lightly-doped ultra-shallow junction being opposite-conductivity type ions.   
     
     
         2 . The source-drain structure of  claim 1 , wherein the drain-substrate junction comprises an edge curvature smaller than an edge curvature of the lightly-doped ultra-shallow junction. 
     
     
         3 . The source-drain structure of  claim 1 , wherein the drain-substrate junction comprises an impurity ion concentration smaller than an impurity ion concentration of the heavily-doped region. 
     
     
         4 . The source-drain structure of  claim 1 , wherein the source region comprises a source-substrate junction disposed in the vicinity of a junction between a side portion and a bottom portion of the source region and the substrate. 
     
     
         5 . The source-drain structure of  claim 1 , further comprising:
 a gate electrode disposed on a surface of the substrate between the source region and the drain region;   spacers disposed on opposite sidewalls of the gate electrode and extending along the gate electrode to an edge of the heavily-doped region of the drain region.   
     
     
         6 . The source-drain structure of  claim 1 , further comprising an n-type channel, wherein the impurity ions in the drain-substrate junction are p-type ions.