Semiconductor test apparatus for controlling tester

Abstract

A tester instruction generation unit generates a tester instruction for terminals of a plurality of devices connected to a tester based on an instruction of a user program and causes an instruction storage unit to store the tester instruction. A transfer mode setting unit sets a transfer mode to either a successive transfer mode or a batch transfer mode, based on the number of tester instructions in the instruction storage unit or an instruction of the user program. A transfer control unit transmits the tester instruction in the instruction storage unit to the tester in accordance with the set transfer mode.

What is claimed is: 
     
         1 . A semiconductor test method for controlling a tester to which a plurality of devices are connected, comprising:
 executing an instruction of a user program;   generating a tester instruction for terminals of the plurality of devices connected to said tester based on the instruction of said user program and storing said tester instruction into an instruction storage unit;   setting a transfer mode to either a successive transfer mode or a batch transfer mode based on the information on how many tester instructions are stored in said instruction storage unit; and   transmitting the tester instruction in said instruction storage unit to said tester in accordance with set said transfer mode.   
     
     
         2 . A semiconductor test apparatus for controlling a tester to which a plurality of devices are connected, comprising:
 a user program execution unit executing an instruction of a user program;   an instruction generation unit generating a tester instruction for terminals of the plurality of devices connected to said tester based on the instruction of said user program;   an instruction storage unit storing generated said tester instruction;   a transfer mode setting unit setting a transfer mode to a mode shorter in transfer time period of a successive transfer mode and a batch transfer mode based on the information on how many tester instructions are stored in said instruction storage unit; and   a transfer control unit transmitting the tester instruction in said instruction storage unit to said tester in accordance with set said transfer mode, wherein the transfer time period of successive transfer mode is (ts1+ts2)×N and the transfer time period of the batch transfer is tb1+tb2×N, in which ts1 represents a time period required for pre-processing for transfer in the successive transfer mode, ts2 represents a time period required for transfer of one tester instruction from said instruction storage unit to said tester in the successive transfer mode, represents a time period required for pre-processing for transfer in the batch transfer mode, represents a time period required for transfer of one tester instruction from said instruction storage unit to said tester in the batch transfer mode, and N represents the information on how many tester instructions are stored in said instruction storage unit.   
     
     
         3 . The semiconductor test apparatus according to  claim 2 , comprising:
 a memory storing a list of abnormal devices among the plurality of devices connected to said tester; and   a device management unit identifying an abnormal device among the plurality of devices connected to said tester in accordance with a signal transmitted from said tester and updating the list of said abnormal devices, wherein   said instruction generation unit generates tester instructions as many as terminals of a normal device among the plurality of devices connected to said tester, by referring to the list of said abnormal devices based on the instruction of said user program.   
     
     
         4 . The semiconductor test apparatus according to  claim 2 , wherein
 said transfer mode setting unit sets said transfer mode when it receives a pattern execution instruction from said user program execution unit.   
     
     
         5 . The semiconductor test apparatus according to  claim 2 , wherein
 said user program includes at least one of a batch transfer switching instruction and a successive transfer switching instruction, and   said transfer mode setting unit sets the transfer mode to said batch transfer mode when it received said batch transfer switching instruction from said user program execution unit and sets the transfer mode to said successive transfer mode when it received said successive transfer switching instruction from said user program execution unit.   
     
     
         6 . The semiconductor test apparatus according to  claim 2 , wherein
 said transfer mode setting unit sets the transfer mode to said batch transfer mode when said tester instruction generated based on the instruction received from said user program execution unit includes a read instruction from the tester.   
     
     
         7 . A semiconductor test apparatus for controlling a tester to which a plurality of devices are connected, comprising:
 a user program execution unit executing an instruction of a user program;   an instruction generation unit generating a tester instruction for terminals of the plurality of devices connected to said tester based on the instruction of said user program;   an instruction storage unit storing generated said tester instruction;   a transfer mode setting unit setting a transfer mode to either a successive transfer mode or a batch transfer mode;   a transfer control unit transmitting the tester instruction in said instruction storage unit to said tester in accordance with set said transfer mode; and   a test item storage unit storing a test item of which test in said device has failed in said batch transfer mode, wherein   said transfer mode setting unit sets the transfer mode for the tester instruction generated from an instruction included in the test item stored in said test item storage unit to said successive transfer mode.   
     
     
         8 . The semiconductor test apparatus according to  claim 7 , wherein
 said transfer mode setting unit sets the transfer mode for the tester instruction generated from the instruction included in said user program in a pretest to said batch transfer mode, and the semiconductor test apparatus further comprising:   a device management unit identifying a test item which has failed in accordance with a signal transmitted from said tester and writing identified said test item in said test item storage unit.   
     
     
         9 . A semiconductor test apparatus for controlling a tester to which a plurality of devices are connected, comprising:
 a user program execution unit executing an instruction of a user program;   an instruction generation unit generating a tester instruction for terminals of the plurality of devices connected to said tester based on the instruction of said user program;   an instruction storage unit storing generated said tester instruction;   a transfer mode setting unit setting a transfer mode to either a successive transfer mode or a batch transfer mode;   a transfer control unit transmitting the tester instruction in said instruction storage unit to said tester in accordance with set said transfer mode; and   a test item storage unit storing a test item of which first measurement value obtained in a test in said device in said successive transfer mode and second measurement value obtained in a test in said device in said batch transfer mode are different from each other by a prescribed value or more, wherein   said transfer mode setting unit sets the transfer mode for the tester instruction generated from an instruction of the test item stored in said test item storage unit to said successive transfer mode.   
     
     
         10 . The semiconductor test apparatus according to  claim 9  further comprising:
 a device management unit; wherein 
 said transfer mode setting unit sets the transfer mode for the tester instruction generated from the instruction included in said user program in a first pretest to said successive transfer mode, 
 said device management unit writes said first measurement value of each test item in said test item storage unit in accordance with a signal transmitted from said tester, 
 said transfer mode setting unit sets the transfer mode for the tester instruction generated from the instruction included in said user program in a second pretest to said batch transfer mode, 
 said device management unit writes said second measurement value of each test item in said test item storage unit in accordance with a signal transmitted from said tester, and 
 said device management unit writes the test item of which said first measurement value and said second measurement value are different from each other by the prescribed value or more in said test item storage unit